US10349520B2ActiveUtilityA1

Multi-layer circuit board using interposer layer and conductive paste

72
Assignee: SIERRA CIRCUITS INCPriority: Jun 28, 2017Filed: Jun 28, 2017Granted: Jul 9, 2019
Est. expiryJun 28, 2037(~11 yrs left)· nominal 20-yr term from priority
H05K 2201/09572H05K 3/462H05K 1/095H05K 1/115H05K 3/06H05K 2203/068H05K 2201/10378H05K 3/425H05K 1/111H05K 3/181H05K 1/0313H05K 2203/085H05K 3/4623H05K 2201/0236H05K 3/4069H05K 3/4626
72
PatentIndex Score
1
Cited by
106
References
18
Claims

Abstract

A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. A multi-layer circuit board formed from a top sub, and one or more composite layers, each composite layer comprising an interposer layer and a sub layer;
 said top sub and each said sub layer having at least one interconnection to a sub layer which is opposite an intervening interposer layer; 
 said interposer layer having an aperture positioned at each said interconnection between associated said sub layers; 
 said sub layers having a plated via or a pad at each said interconnection; 
 each said interconnection having a solid metallic connection; 
 at least one of the top sub or the sub layer having a surface, the surface having channels formed in the surface, the channels containing traces below the surface, the channels having catalytic particles exposed below the surface. 
 
     
     
       2. The multi-layer circuit board of  claim 1  where at least one of said top sub or one of said sub layer is a catalytic laminate with traces formed on at least one surface using an electroless plating process. 
     
     
       3. The multi-layer circuit board of  claim 2  where said traces are formed in channels which have a depth of at least a catalytic particle exclusion depth. 
     
     
       4. The multi-layer circuit board of  claim 1  where said traces are formed above a non-catalytic laminate. 
     
     
       5. The multi-layer circuit board of  claim 1  where said interposer is formed from at least one of: polyimide, B-stage pre-preg, epoxy or epoxy blends for flexible or non-flexible dielectrics, cyanate ester, Polytetrafluoroethylene (PTFE) or PTFE blend prepreg or adhesives, or bond plies including sequential layers of adhesive, polyimide, and adhesive. 
     
     
       6. The multi-layer circuit board of  claim 1  where said solid metallic connection contains at least one of: copper, silver, gold, palladium, nickel, indium, bismuth, tin, or lead. 
     
     
       7. The multi-layer circuit board of  claim 1  where said solid metallic connection contains a binder for conductive particles which includes at least one of: phenolic plastic, a resin, or novolac epoxy resin. 
     
     
       8. The multi-layer circuit board of  claim 1  where at least one of said top sub or a sub of said composite layer includes a via having an inner diameter on the order of 1 mil after plating. 
     
     
       9. The multi-layer circuit board of  claim 1  where at least one of said interposers has an aperture on the order of 1 mil diameter. 
     
     
       10. A multi-layer circuit board comprising:
 a top sub comprising a dielectric layer having electrically conductive traces formed on a surface; 
 one or more composite layers, each composite layer comprising:
 a sub layer formed from a dielectric layer having electrically conductive traces formed on a surface, the electrically conductive traces having at least one region of interconnection; 
 an interposer layer having at least one aperture located at said at least one region of interconnection; 
 
 said top sub and each said sub layer having at least one interconnection to a sub layer which is opposite an intervening interposer layer; 
 said sub layers having a plated via or a pad at each said interconnection; 
 each said interconnection comprising a solid metallic connection formed from melting a metallic paste, 
 at least one sub layer having traces formed in channels and below a surface of the sub layer, the inner surfaces of the channels having exposed particles of catalytic material for electroplating a metal trace formed in the channel. 
 
     
     
       11. The multi-layer circuit board of  claim 10  where said melted metallic paste is formed by an elevated temperature lamination which laminates the interposer layer to at least one of a top sub or a composite layer. 
     
     
       12. The multi-layer circuit board of  claim 10  where at least one of said top sub or said sub layer has electrically conductive traces formed by electroless plating. 
     
     
       13. The multi-layer circuit board of  claim 10  where at least one of said top sub or said sub layer has electrically conductive traces in channels below a surface layer. 
     
     
       14. The multi-layer circuit board of  claim 13  where the traces are in contact with catalytic particles in the channel. 
     
     
       15. The multi-layer circuit board of  claim 10  where the electrically conductive traces are formed by patterned copper foil bonded to a non-catalytic laminate. 
     
     
       16. The multi-layer circuit board of  claim 10  where the conductive paste contains at least one of: copper, silver, gold, palladium, nickel, indium, bismuth, tin, or lead. 
     
     
       17. The multi-layer circuit board of  claim 10  where the conductive paste contains a binder for conductive particles which includes at least one of: phenolic plastic, a resin, or novolac epoxy resin. 
     
     
       18. The multi-layer circuit board of  claim 10  where the interposer is formed from at least one of: polyimide, B-stage pre-preg, epoxy or epoxy blends for flexible or non-flexible dielectrics, cyanate ester, Polytetrafluoroethylene (PTFE) or PTFE blend prepreg or adhesives, or bond plies comprising sequential layers of adhesive, polyimide, and adhesive.

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