Printed circuit board circuit test fixture with adjustable density of test probes mounted thereon

Abstract

A printed circuit board (PCB) test fixture includes a substrate, a first insulation layer formed on the substrate, a conductor layer formed on the first insulation layer and electrically connected to the upper electrodes through at least one first connection member, a second insulation layer formed on the first insulation layer, and multiple conductive cones arranged on the second insulation layer in a matrix form. A part of the conductive cones is electrically connected to the conductor layer through at least one second connection member. The circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member is employed to supply testing power to a part of the conductive cones and an adjustable arrangement of the conductive cones to enhance density of test probes upon electrical testing.

What is claimed is: 
     
       1. A printed circuit board (PCB) test fixture with adjustable density of test probes mounted thereon, comprising:
 a substrate having a lower surface and an upper surface; 
 multiple lower electrodes formed on the lower surface of the substrate; 
 multiple upper electrodes formed on the upper surface of the substrate, vertically aligned with the respective lower electrodes, and electrically connected to the respective lower electrodes; 
 a first insulation layer formed on the upper surface of the substrate and having at least one first connection member electrically connected to corresponding upper electrodes; 
 a conductor layer formed on the first insulation layer and electrically connected to the at least one first connection member and the corresponding upper electrodes; 
 multiple connection electrodes formed on the first insulation layer and vertically aligned with the respective upper electrodes, wherein a part of the multiple connection electrodes is electrically connected to the respective at least one first connection member for the conductor layer and the part of the multiple connection electrodes to be electrically connected to a part of the multiple upper electrodes through the respective at least one first connection member; 
 a second insulation layer formed on the first insulation layer and having at least one second connection member electrically connected to the conductor layer; 
 multiple surface electrodes formed on the second insulation layer and vertically aligned with the respective connection electrodes, wherein a part of the multiple surface electrodes is connected to the respective at least one second connection member; and 
 multiple conductive cones formed on the second insulation layer, mounted on the respective surface electrodes, and adapted to electrically contact a PCB to be tested, wherein a part of the multiple conductive cones is electrically connected to the respective at least one second connection member, and a minimum distance is formed between each adjacent two of the multiple conductive cones without causing electrical contact with the respective surface electrodes underneath the multiple conductive cones; 
 wherein a circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member are formed to correspond to electrodes of the PCB to be tested. 
 
     
     
       2. The PCB test fixture as claimed in  claim 1 , wherein each conductive cone has:
 a conducting layer being conical; 
 a strengthening layer formed around a periphery of the conducting layer to enclose the conducting layer; and 
 an anti-oxidant layer formed around a periphery of the strengthening layer to enclose the strengthening layer and the conducting layer therein. 
 
     
     
       3. The PCB test fixture as claimed in  claim 2 , wherein the conducting layer is made from one of copper and a copper alloy. 
     
     
       4. The PCB test fixture as claimed in  claim 2 , wherein the strengthening layer is made from one of nickel, cobalt, tungsten and an alloy thereof. 
     
     
       5. The PCB test fixture as claimed in  claim 2 , wherein the anti-oxidant layer is made from one of gold, tin and an alloy thereof. 
     
     
       6. The PCB test fixture as claimed in  claim 1 , wherein the substrate is a ceramic substrate. 
     
     
       7. The PCB test fixture as claimed in  claim 2 , wherein the substrate is a ceramic substrate. 
     
     
       8. The PCB test fixture as claimed in  claim 3 , wherein the substrate is a ceramic substrate. 
     
     
       9. The PCB test fixture as claimed in  claim 4 , wherein the substrate is a ceramic substrate. 
     
     
       10. The PCB test fixture as claimed in  claim 5 , wherein the substrate is a ceramic substrate.