MEMS capacitive pressure sensors in fully depleted semiconductor on insulator (FDSOI)

Abstract

The present disclosure relates to semiconductor structures and, more particularly, to pressure sensors and methods of manufacture. The structure includes: a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; a back gate under the top membrane; and a cavity defined between the top membrane and the back gate.

What is claimed: 
     
       1. A structure, comprising:
 a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; 
 a back gate under the top membrane; and 
 a cavity defined between the top membrane and the back gate, 
 wherein the liner material is an insulator material and the epitaxial material is a semiconductor material of a different polarity type than the top membrane. 
 
     
     
       2. The structure of  claim 1 , wherein the back gate is a bottom membrane of a capacitive pressure sensor, and the top membrane and the bottom membrane have a same polarity. 
     
     
       3. The structure of  claim 1 , wherein the back gate is a bottom membrane of a capacitive pressure sensor, and the top membrane and the bottom membrane have different polarities. 
     
     
       4. The structure of  claim 1 , wherein the epitaxial material is a doped epitaxially grown semiconductor material and the liner material is SiN, SiO 2 , a-Si or combinations thereof. 
     
     
       5. The structure of  claim 1 , wherein the semiconductor material of the top membrane is semiconductor on insulator (SOI) material, and the back gate is a doped bulk semiconductor material. 
     
     
       6. A structure, comprising:
 a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; 
 a back gate under the top membrane; and 
 a cavity defined between the top membrane and the back gate, 
 wherein the cavity is defined by the top membrane, the bottom membrane and its edges are defined by the epitaxial material and the liner material. 
 
     
     
       7. A structure comprising:
 a top membrane of semiconductor material having it edges defined by epitaxial material and a liner material; 
 a bottom membrane of doped bulk semiconductor material; and 
 a cavity defined by the top membrane and the bottom membrane, with its edges defined by the epitaxial material on one edge and the liner material on remaining edges. 
 
     
     
       8. The structure of  claim 7 , wherein top membrane and the bottom membrane are part of a capacitive pressure sensor, and the top membrane and the bottom membrane have a same polarity. 
     
     
       9. The structure of  claim 7 , wherein the top membrane and the bottom membrane are part of a capacitive pressure sensor, and the top membrane and the bottom membrane have different polarities. 
     
     
       10. The structure of  claim 7 , wherein the epitaxial material is a semiconductor material of a different polarity type than the top membrane.