Method and apparatus for providing power state information using in-band signaling

Abstract

A method and apparatus for providing power state information using in-band signaling are described. In one embodiment, an integrated circuit (IC) device comprises a controller operable to receive a command from a platform control bus, the command requesting data that is unrelated to information about a power state in which the IC resides; and control logic operable to obtain data for inclusion in a response to the command, wherein the controller is operable to send the response over a bus, the response containing at least a portion of the data responsive to the command and containing power state information for the IC.

We claim: 
     
       1. An integrated circuit (IC) device comprising:
 a controller operable to receive a command from a platform control bus, the command includes a request for data from the IC in a power saving mode state unrelated to a request for a power state status of the IC; and 
 control logic operable to obtain data for inclusion in a response to the request for data in the command, 
 wherein the controller is operable to send the response over a bus, the response includes at least a portion of data responsive to the request for data in the command and includes power state information of a power state status of the IC in place of other data responsive to the command that would be sent in response to the command but for inclusion of the power state information, and wherein the controller sends the power state status of the IC included in the response without the IC having to exit from the power saving mode state. 
 
     
     
       2. The device defined in  claim 1  wherein the power state information indicates whether the IC is currently in one or more reduced power consumption states, and further wherein the control logic is operable to obtain the data for inclusion in the response without having the IC leave a power state in which the IC currently resides. 
     
     
       3. The device of  claim 2  wherein the one or more reduced power consumption states comprises one or more deep sleep states selected from a group of C8, C9 and C10 C-states. 
     
     
       4. The device defined in  claim 1  wherein the bus is a platform control bus. 
     
     
       5. The device defined in  claim 4  wherein the platform control bus comprises a Platform Environment Control Interface (PECI) bus and the controller comprises a PECI controller. 
     
     
       6. The device defined in  claim 1  wherein the power state information comprises a bit in the response. 
     
     
       7. The device defined in  claim 1  wherein the command comprises a temperature command to obtain temperature data for the IC, and further wherein the response includes the power state information in a least significant bit (LSB) in place of another bit of the temperature data. 
     
     
       8. The device defined in  claim 1  further comprising logic operable to set the power state information after a determination to enter a reduced power consumption state has been made yet prior to entry into the reduced power consumption state. 
     
     
       9. The device defined in  claim 1  wherein the command comprises a temperature command to obtain temperature data for the IC. 
     
     
       10. The device defined in  claim 1  wherein the controller is operable to send the power state information using in-band signaling. 
     
     
       11. The device defined in  claim 1  further comprising one or more processor cores, and wherein the control logic comprises power control logic coupled to the one or more processor cores. 
     
     
       12. A method comprising:
 receiving, by an integrated circuit (IC), a command from a bus, the command requesting data from the IC in a power saving mode state unrelated to a request for a power state status of the IC; and 
 sending a response to the command requesting data over the bus including power state information of a power state status of the IC using in-band signaling, the response including at least a portion of data responsive to the command requesting data and including power state information for the IC in place of other data responsive to the command that would be sent in response to the command but for inclusion of the power state information, wherein the power state status of the IC included in the response is sent without the IC having to exit the power saving mode state. 
 
     
     
       13. The method defined in  claim 12  wherein the power state information indicates whether the IC is currently in one or more reduced power consumption states, and further comprising obtaining data for inclusion in the response without having the IC leave a power state in which the IC currently resides. 
     
     
       14. The method of  claim 13  wherein the one or more reduced power consumption states comprises one or more deep sleep states selected from a group of C8, C9 and C10 C-states. 
     
     
       15. The method defined in  claim 13  wherein the command comprises a temperature command to obtain temperature data for the IC. 
     
     
       16. The method defined in  claim 12  wherein the bus comprises a platform control bus. 
     
     
       17. The method defined in  claim 16  wherein the platform control bus comprises a Platform Environment Control Interface (PECI) bus. 
     
     
       18. The method defined in  claim 12  wherein the power state information comprises a bit in the response. 
     
     
       19. The method defined in  claim 12  wherein the command comprises a temperature command to obtain temperature data for the IC, and further comprising including the power state information in a least significant bit (LSB) of the response in place of another bit of the temperature data. 
     
     
       20. The method defined in  claim 12  further comprising setting the power state information after a determination to enter a reduced power consumption state has been made yet prior to entry into the reduced power consumption state. 
     
     
       21. A system comprising:
 a first bus; 
 a first controller coupled to the first bus; 
 an integrated circuit (IC) device coupled to the first bus, wherein the IC comprises
 a second controller operable to receive a command from the first controller via the first bus, the command requesting data from the IC in a power saving mode state unrelated to a request for a power state status of the IC, and 
 control logic operable to obtain data for inclusion in a response to the command requesting data, 
 wherein the second controller is operable to send the response over the first bus, the response includes at least a portion of data responsive to the command requesting data and includes power state information of a power state status of the IC in place of other data responsive to the command that would be sent in response to the command but for inclusion of the power state information, wherein the second controller sends the power state status of the IC included in the response without the IC having to exit from the power saving mode state. 
 
 
     
     
       22. The system defined in  claim 21  wherein the power state information indicates whether the IC is currently in one or more reduced power consumption states, and further wherein the control logic is operable to obtain the data for inclusion in the response without having the IC leave a power state in which the IC currently resides. 
     
     
       23. The system of  claim 21  wherein the one or more reduced power consumption states comprises one or more deep sleep states selected from a group of C8, C9 and C10 C-states. 
     
     
       24. The system defined in  claim 21  wherein the first bus comprises a Platform Environment Control Interface (PECI) bus and the second controller comprises a PECI controller. 
     
     
       25. The system defined in  claim 21  wherein the controller is a part of a node manager. 
     
     
       26. The system defined in  claim 21  further comprising:
 a bridge coupled to the second controller via the first bus; and 
 a second bus coupling the first controller to the bridge. 
 
     
     
       27. The system defined in  claim 26  wherein the bridge is operable to provide the power state information to the embedded controller that was previously obtained and cached. 
     
     
       28. An article of manufacture having one or more non-transitory computer readable media storing instructions which, when executed by a system, cause the system to perform a method comprising:
 receiving, by an integrated circuit (IC), a command from a bus, the command requesting data from the IC in a power saving mode state unrelated to a request for a power state status of the IC; and 
 sending a response to the command requesting data over the bus including power state information of a power state status of the IC using in-band signaling, the response including at least a portion of data responsive to the command requesting data and including power state information for the IC in place of other data responsive to the command that would be sent in response to the command but for inclusion of the power state information, wherein the power state status of the IC included in the response is sent without the IC having to exit from the power saving mode state. 
 
     
     
       29. The article of manufacture defined in  claim 28  wherein the power state information indicates whether the IC is currently in one or more reduced power consumption states, and further comprising obtaining data for inclusion in the response without having the IC leave a power state in which the IC currently resides. 
     
     
       30. The article of manufacture of  claim 29  wherein the one or more reduced power consumption states comprises one or more deep sleep states selected from a group of C8, C9 and C10 C-states.