US10665676B2ActiveUtilityA1
Body contact layouts for semiconductor structures
Est. expiryMay 12, 2034(~7.8 yrs left)· nominal 20-yr term from priority
H01L 23/5226H01L 29/0847H01L 29/66568H01L 23/5283H01L 29/1087H01L 2924/0002H01L 29/78H01L 27/088H01L 2924/00H01L 29/1095H01L 23/535H01L 29/0692H10W 20/435H10W 20/42H10W 20/20H10D 84/83H10D 62/393H10D 62/151H10D 62/126H10D 30/60H10D 30/027H10D 62/378
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Claims
Abstract
Body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a semiconductor structure comprises: a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space; a source region disposed between two of the plurality of gates; a plurality of body contacts disposed in each source region; and wherein a portion of each source region, adjacent to the gate, has a width extending parallel to the y-axis that is greater than the width of the source region parallel to the y-axis at a distance on an x-axis from the gate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor circuit, comprising:
a plurality of field-effect transistors (FETs);
a first FET driver coupled to a first FET of the plurality of FETs; and
a second FET driver coupled to a second FET of the plurality of FETs, wherein at least one FET of the plurality of FETs includes:
a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space;
a source region disposed in the semiconductor layer between two of the plurality of gates; and
a plurality of body contacts disposed in the source region, wherein each body contact is in direct physical contact with a respective gate of the plurality of gates and has a width extending parallel to the y-axis that decreases as the body contact approaches the respective gate of the plurality of gates from approximately the center of the body contact.
2. The semiconductor circuit of claim 1 , wherein each body contact of the plurality of body contacts has sides that form the shape of a polygon or a modified polygon at a working surface of the semiconductor layer.
3. The semiconductor circuit of claim 2 , wherein the polygon or modified polygon has a side that is canted from a side of a gate of the plurality of gates.
4. The semiconductor circuit of claim 2 , wherein the polygon is one of the following:
a square, a rectangle, a parallelogram, a trapezoid, a pentagon, a hexagon, an octagon, a star or a quadrilateral.
5. The semiconductor circuit of claim 2 , wherein the modified polygon is a polygon that has at least one modified corner, side, or both.
6. The semiconductor circuit of claim 5 , wherein the at least one modified corner is a rounded corner.
7. The semiconductor circuit of claim 1 , wherein each body contact of the plurality of body contacts has sides that form the shape of substantially a circle.
8. A system comprising:
a power source configured to provide a voltage signal;
a voltage regulator configured to regulate the voltage signal from the power source and produce an output voltage signal;
a load coupled to the voltage regulator to receive the output voltage signal; and
wherein at least one of the voltage regulator, the power source or the load includes a field-effect transistor (FET) used in producing the output voltage signal and wherein the FET includes:
a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space;
a source region disposed in the semiconductor layer between two of the plurality of gates;
a plurality of body contacts disposed in the source region; and
wherein each body contact is in direct physical contact with a respective gate of the plurality of gates and has a width, adjacent to the gate and extending parallel to the y-axis, that is less than the width of the of the body contact parallel to the y-axis at a distance on the x-axis from the respective gate.
9. The system of claim 8 , wherein each body contact of the plurality of body contacts has sides that form the shape of a polygon or a modified polygon at a working surface of the semiconductor layer.
10. The system of claim 9 , wherein the polygon or modified polygon has a side that is canted from a side of a gate of the plurality of gates.
11. The system of claim 9 , wherein the polygon is one of the following: a square, a rectangle, a parallelogram, a trapezoid, a pentagon, a hexagon, an octagon, a star or a quadrilateral.
12. The system of claim 9 wherein the modified polygon is a polygon that has at least one modified corner, side, or both.
13. The system of claim 12 , wherein the at least one modified corner is a rounded corner.
14. The system of claim 9 , wherein each body contact of the plurality of body contacts includes at least one side with a normal that is oriented with an angular deviation of between substantially 5 degrees and 85 degrees from the normal of a side of a gate of the plurality of gates.
15. The system of claim 9 , wherein each body contact of the plurality of body contacts has sides that form the shape of substantially a circle.
16. The system of claim 9 , wherein the FET comprises a power MOSFET.Cited by (0)
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