Process for printed circuit boards using backing foil

Abstract

A method for making a circuit board uses a dielectric core, and at least one thin foil bottom surface with a foil backing of sufficient thickness to absorb heat from a laser drilling operation to prevent the penetration of the thin foil bottom surface during laser drilling. A sequence of steps including a laser drilling step, removing the foil backing step, electroless plating step, patterned resist step, electroplating step, resist strip step, tin plate step, and copper etch step are performed, which provide dot vias of fine linewidth and resolution.

We claim: 
     
       1. A process for forming fine pitch dot vias on a laminate having a top surface and a bottom surface, the bottom surface having a bottom thin foil bonded to the bottom surface of the laminate, and a backing foil which is removable and comparatively thicker than the bottom thin foil, the bottom thin foil having a bottom surface adjacent to the backing foil, the process comprising:
 laser drilling blind vias through the laminate top surface without penetrating the bottom thin foil, drilling at least one through hole penetrating through the laminate, the bottom thin foil, and the backing foil; 
 removing the backing foil; 
 treating exposed surfaces of the laser drilled vias and exposed surfaces of the at least one drilled through hole with a catalyst; 
 electroless plating:
 the bottom surface of the bottom thin foil, 
 the exposed surfaces of the vias, and 
 the exposed surfaces of the at least one drilled through hole; 
 
 applying patterned resist over the top surface and the bottom thin foil surface; 
 electro-plating the circuit board until copper is deposited to a level below the patterned resist; 
 tin plating the exposed copper regions of the circuit board; 
 stripping the patterned resist; 
 quick etching the exposed copper regions to the underlying laminate. 
 
     
     
       2. The process of  claim 1  wherein said bottom thin foil is copper foil in the range of 0.12 mil to 0.15 mil in thickness. 
     
     
       3. The process of  claim 1  wherein said laser drilled vias are less than 5 mils in diameter. 
     
     
       4. The process of  claim 1  wherein said electroless plating and said electroplating deposits copper. 
     
     
       5. The process of  claim 1  wherein said catalyst comprises at least one of: Palladium (Pd), platinum (Pt), rhodium (Rh), iridium (Ir), nickel (Ni), gold (Au), silver (Ag), cobalt (Co), copper (Cu), iron (Fe), manganese (Mn), chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti), or tin (Sn). 
     
     
       6. The process of  claim 1  wherein said treating the exposed surfaces of the laser drilled vias and exposed surface of the at least one drilled hole with a catalyst comprises the dielectric having catalytic particles which are exposed during said laser drilling step. 
     
     
       7. The process of  claim 1  wherein said electroless plating step deposits in the range of 0.06 mil to 0.12 mil thickness of copper over said bottom thin foil. 
     
     
       8. The process of  claim 1  wherein said patterned resist comprises optically exposed dry film. 
     
     
       9. The process of  claim 1  wherein said quick etching step further comprises an ammonium based etchant comprising at least one of ammonium chloride or ammonium sulfate. 
     
     
       10. The process of  claim 1  wherein quick etching the exposed copper regions includes etching the tin plating. 
     
     
       11. A process for forming fine pitch dot vias on a laminate having a bottom thin foil bonded to the laminate, a comparatively thicker backing foil adjacent to the bottom thin foil, and a thin top foil, the process comprising:
 forming laser drilled blind vias through a top surface of the laminate to reach the bottom thin foil, drilling at least one through hole penetrating through the laminate, the bottom thin foil, and the backing foil; 
 removing the backing foil; 
 treating exposed surfaces of the laser drilled blind vias and exposed surfaces of the at least one through hole with a catalyst; 
 electroless plating a surface of the thin top foil, a surface of the bottom thin foil, the exposed surfaces of the laser drilled blind vias, and the exposed surfaces of the at least one through hole; 
 applying patterned resist over the surface of the thin top foil and the surface of the bottom thin foil; 
 electro-plating a copper deposition onto unpatterned surfaces of the thin top foil and onto unpatterned surfaces of the bottom thin foil until the copper deposition is deposited to a level below the patterned resist; 
 tin plating the copper deposition of the circuit board; 
 stripping the patterned resist; 
 quick etching the exposed copper regions until the thin top foil and bottom thin foil are removed to the level of the laminate. 
 
     
     
       12. The process of  claim 11  where said bottom thin foil or said thin top foil comprises copper foil in the range of 0.12 mil to 0.15 mil in thickness. 
     
     
       13. The process of  claim 11  where said laser drilled blind vias are less than 5 mils in diameter. 
     
     
       14. The process of  claim 11  where said electroless plating and also said electroplating form copper depositions. 
     
     
       15. The process of  claim 11  where said catalyst comprises at least one of: Palladium (Pd), platinum (Pt), rhodium (Rh), iridium (Ir), nickel (Ni), gold (Au), silver (Ag), cobalt (Co), copper (Cu), iron (Fe), manganese (Mn), chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti), or tin (Sn). 
     
     
       16. The process of  claim 11  where said treating the exposed surfaces of the laser drilled vias and the exposed surfaces of the drilled holes with the catalyst comprises the dielectric having catalytic particles which are exposed during said laser drilling step. 
     
     
       17. The process of  claim 11  where said electroless plating step deposits in the range of 0.06 mil to 0.12 mil thickness of copper over said bottom thin foil or said thin top foil. 
     
     
       18. The process of  claim 11  where said patterned resist comprises optically exposed dry film. 
     
     
       19. The process of  claim 11  where said quick etching step further comprises an ammonium based etchant comprising at least one of ammonium chloride or ammonium sulfate. 
     
     
       20. The process of  claim 11  where etching the exposed copper regions further comprises etching the tin plating.