Semiconductor structure and manufacturing method thereof

Abstract

A semiconductor structure includes a first fin, a second fin, a first gate, a second gate, at least one spacer, and an insulating structure. The first gate is present on the first fin. The second gate is present on the second fin. The spacer is present on at least one side wall of at least one of the first gate and the second gate. The insulating structure is present between the first fin and the second fin, in which the spacer is substantially absent between the insulating structure and said at least one of the first gate and the second gate.

What is claimed is: 
     
       1. A semiconductor structure, comprising:
 a first fin; 
 a first epitaxy structure over the first fin; 
 a first silicon cap over the first epitaxy structure; 
 a second fin; 
 a first gate on the first fin; 
 an insulating structure between the first fin and the second fin; 
 an inter-layer dielectric (ILD) layer surrounding the first fin, the second fin, the first gate, and the insulating structure, wherein a top surface of the insulating structure is free from the ILD layer, wherein the ILD layer is separated from the first epitaxy structure by the first silicon cap, and wherein the ILD layer is in physical contact with the first silicon cap; 
 a first spacer extending along a sidewall of the first gate and a first sidewall of the insulating structure, the first spacer separating the first gate and the insulating structure from the ILD layer; 
 a second spacer extending along a sidewall of a second gate on the second fin and a second sidewall of the insulating structure opposite the first sidewall; and 
 an insulating layer under the insulating structure, the insulating layer extending from contact with the first spacer to contact with the second spacer. 
 
     
     
       2. The semiconductor structure of  claim 1 , further comprising an isolation structure extending between the first fin and the second fin, wherein the insulating structure and the ILD layer are disposed on the isolation structure. 
     
     
       3. The semiconductor structure of  claim 2 , wherein the
 insulating layer is between the isolation structure and the insulating structure. 
 
     
     
       4. The semiconductor structure of  claim 3 , wherein the insulating layer and the insulating structure are made of different materials. 
     
     
       5. The semiconductor structure of  claim 3 , wherein the insulating layer is made of silicon nitride. 
     
     
       6. The semiconductor structure of  claim 1 , wherein the insulating structure is in contact with the first gate. 
     
     
       7. The semiconductor structure of  claim 1 , wherein the insulating structure is made of silicon nitride. 
     
     
       8. A semiconductor structure, comprising:
 a fin; 
 a gate on the fin; 
 an epitaxy structure on the fin adjacent to the gate; 
 an isolation structure adjacent to the fin, wherein the isolation structure is in physical contact with the epitaxy structure; 
 an insulating structure on the isolation structure, the insulating structure contacting an end surface of the gate, wherein a top surface of the gate is coplanar with a top surface of the insulating structure; 
 an insulating layer between the insulating structure and the isolation structure, wherein the isolation structure has a width in a first direction greater than widths of the insulating structure or the insulating layer in the first direction, and wherein a greatest width of the insulating layer in the first direction is equal to a greatest width of the insulating structure in the first direction; and 
 a spacer in contact with a side surface of the gate, wherein the spacer and the insulating structure are made of different materials. 
 
     
     
       9. The semiconductor structure of  claim 8 , wherein the insulating layer and the isolation structure are made of different materials. 
     
     
       10. The semiconductor structure of  claim 8 , wherein the spacer extends continuously along the side surface of the gate and a side surface of the insulating structure. 
     
     
       11. The semiconductor structure of  claim 8 , wherein the spacer is disposed on sidewalls of the insulating structure and the insulating layer. 
     
     
       12. The semiconductor structure of  claim 8 , wherein the insulating structure and the fin extend in a first direction, and wherein the gate extends in a second direction perpendicular to the first direction. 
     
     
       13. The semiconductor structure of  claim 8 , further comprising an inter-layer dielectric (ILD) layer surrounding the fin, the gate, and the insulating structure, the ILD layer comprising a different material from the insulating structure. 
     
     
       14. A semiconductor structure comprising:
 a first fin extending from a substrate, the first fin extending in a first direction; 
 a second fin extending from the substrate, the second fin extending in a direction parallel with the first direction; 
 a first epitaxy structure over the first fin; 
 a second epitaxy structure over the second fin; 
 a first gate over the first fin, the first gate extending in a second direction perpendicular to the first direction; 
 a shallow trench isolation (STI) structure extending between the first fin and the second fin, wherein the STI structure is in physical contact with the first fin, the second fin, the first epitaxy structure, and the second epitaxy structure; 
 an insulating structure disposed on the STI structure between the first fin and the second fin, the insulating structure extending in a direction parallel with the first direction; and 
 an inter-layer dielectric (ILD) layer surrounding the first fin, the second fin, the first gate, and the insulating structure, wherein topmost surfaces of the ILD layer, the first gate, and the insulating structure are level with one another. 
 
     
     
       15. The semiconductor structure of  claim 14 , further comprising a second gate on the second fin, the second gate extending in a direction parallel with the second direction, wherein the insulating structure separates the first gate from the second gate. 
     
     
       16. The semiconductor structure of  claim 15 , wherein the first gate and the second gate are in contact with the insulating structure. 
     
     
       17. The semiconductor structure of  claim 14 , further comprising a spacer extending continuously along a sidewall of the first gate and a sidewall of the insulating structure. 
     
     
       18. The semiconductor structure of  claim 17 , wherein the spacer separates the ILD layer from the first gate and the insulating structure. 
     
     
       19. The semiconductor structure of  claim 14 , further comprising:
 an insulating layer disposed between the insulating structure and the STI structure; and 
 a spacer extending along sidewalls of the insulating layer and the insulating structure. 
 
     
     
       20. The semiconductor structure of  claim 14 , further comprising an insulating layer disposed between the insulating structure and the STI structure, wherein bottommost surfaces of the insulating layer, the ILD layer, and the first gate are level with each other.