Forming self-aligned multi-metal interconnects

Abstract

An interconnect structure is provided. The interconnect structure includes first conducting lines and second conducting lines. The first conducting lines are formed of a first metallic material and include at least one individual first conducting line in contact with a first corresponding substrate conducting line. The second conducting lines are formed of a second metallic material and include at least one individual second conducting line between neighboring first conducting lines and in contact with a second corresponding substrate conducting line. The at least one individual second conducting line is separated from each of the neighboring first conducting lines by controlled distances.

What is claimed is: 
     
       1. A method of forming self-aligned multi-metallic interconnects, the method comprising:
 surrounding first conducting lines with dielectric material such that tops of the first conducting lines are exposed through the dielectric material, wherein an exposure of the tops of the first conducting lines comprises:
 forming a section of the dielectric material between a pair of the first conducting lines into spacer-shaped remainders of the dielectric material that abut oppositely facing sidewalls of the pair of the first conducting lines, and 
 controlling widths between oppositely facing sidewalls of the spacer-shaped remainders to effectively control positionings and widths of second conducting lines to be later formed; 
 
 selectively forming self-alignment caps on the tops of the first conducting lines exposed through the dielectric material and on tops of the spacer-shaped remainders of the dielectric material; and 
 forming the second conducting lines in contact with an upper surface of a substrate conducting line and between the first conducting lines and the spacer-shaped remainders of the dielectric material with the self-alignment caps providing self-alignment of the second conducting lines and with oppositely facing sidewalls of the spacer-shaped remainders directly abutting with corresponding sidewalls of the second conducting line such that the widths between the oppositely facing sidewalls of the spacer-shaped remainders effectively control the positionings and the widths of the second conducting lines, 
 wherein the selectively forming of the self-alignment caps comprises executing an atomic layer deposition (ALD) process in which overgrowth of the self-alignment caps is controlled by cycle timing to form each of the self-alignment caps to have a mushroom shape with a rounded upper surface that smoothly interfaces with sides of the spacer-shaped remainders. 
 
     
     
       2. The method according to  claim 1 , further comprising:
 patterning the first conducting lines onto a substrate by an etch process; 
 depositing first dielectric material over the first conducting lines and the substrate; and 
 depositing second dielectric material into spaces defined by the first dielectric material. 
 
     
     
       3. The method according to  claim 1 , wherein the first conducting lines comprise etchable metallic materials. 
     
     
       4. The method according to  claim 1 , wherein the self-alignment caps comprise one or more of zirconium oxide, hafnium oxide, lanthanum oxide, tantalum nitride, titanium nitride and titanium oxide. 
     
     
       5. The method according to  claim 1 , wherein:
 the first conducting lines comprise one or more of tungsten, aluminum, ruthenium and titanium nitride, and 
 the second conducting lines comprise one or more of cobalt, copper, ruthenium and tungsten. 
 
     
     
       6. The method according to  claim 1  further comprising:
 etching dielectric material between the first and second conducting lines; and 
 replacing etched dielectric material with low-k dielectric material and an air gap. 
 
     
     
       7. A method of forming self-aligned multi-metallic interconnects, the method comprising:
 providing a substrate metallization layer with a substrate conducting line disposed therein; 
 forming a pair of first conducting lines on the substrate metallization layer on either side of the substrate conducting line; 
 surrounding the pair of the first conducting lines with dielectric material such that tops of the pair of the first conducting lines are exposed through the dielectric material, wherein an exposure of the tops of the pair of the first conducting lines comprises:
 forming a section of the dielectric material between the pair of the first conducting lines into spacer-shaped remainders of the dielectric material that abut oppositely facing sidewalls of the pair of the first conducting lines, and 
 controlling a width between oppositely facing sidewalls of the spacer-shaped remainders to effectively control a positioning and a width of a second conducting line to be later formed; 
 
 selectively forming self-alignment caps on the tops of the first conducting lines exposed through the dielectric material and on tops of the spacer-shaped remainders of the dielectric material; and 
 forming the second conducting line in contact with an upper surface of the substrate conducting line and between the pair of the first conducting lines and the spacer-shaped remainders of the dielectric material with the self-alignment caps providing self-alignment of the second conducting line and with the oppositely facing sidewalls of the spacer-shaped remainders directly abutting with corresponding sidewalls of the second conducting line such that the width between the oppositely facing sidewalls of the spacer-shaped remainders effectively controlling the positioning and the width of the second conducting line, 
 wherein the selectively forming of the self-alignment caps comprises executing an atomic layer deposition (ALD) process in which overgrowth of the self-alignment caps is controlled by cycle timing to form each of the self-alignment caps to have a mushroom shape with a rounded upper surface that smoothly interfaces with sides of the spacer-shaped remainders.