Noise reduction for overlay control
Abstract
The present disclosure provides a system. The system includes a metrology tool configured to collect overlay errors from a patterned substrate; and a controller module coupled to the metrology tool and configured to generate an overlay compensation from the collected overlay errors, wherein the generating of the overlay compensation includes identifying a portion of the overlay errors as a set of outliers, identifying inside the set of outliers overlay errors not due to reticle effects, thereby creating a set of noise, excluding the set of noise from overlay errors, thereby creating a set of filtered overlay errors, and calculating the overlay compensation based on the set of filtered overlay errors.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A system, comprising:
a metrology tool configured to collect overlay errors from a patterned substrate; and
a controller module coupled to the metrology tool and configured to generate an overlay compensation from the collected overlay errors, wherein the generating of the overlay compensation includes:
identifying a portion of the overlay errors as a set of outliers;
identifying inside the set of outliers overlay errors not due to reticle effects, thereby creating a set of noise;
excluding the set of noise from overlay errors, thereby creating a set of filtered overlay errors; and
calculating the overlay compensation based on the set of filtered overlay errors.
2. The system of claim 1 , further comprising:
a patterning tool configured to form the patterned substrate, wherein the controller module is configured to feed the overlay compensation to the patterning tool to adjust at least one parameter of the patterning tool associating with the forming of the patterned substrate.
3. The system of claim 1 , wherein the identifying of the set of outliers includes creating a wafer map on which the overlay errors are depicted as vectors with magnitude and direction.
4. The system of claim 3 , wherein the identifying of the set of outliers includes dividing the wafer map into multiple fields and identifying the outliers field-by-field.
5. The system of claim 3 , wherein the identifying of the set of outliers includes detecting an abrupt change in the magnitude of the vectors with reference to a reference magnitude.
6. The system of claim 1 , wherein the creating of the set of noise includes dividing the overlay errors into multiple fields and applying at least an inter-field filtering to the overlay errors.
7. The system of claim 6 , wherein the fields are based on an exposure field scheme during a lithography process in forming the patterned substrate.
8. The system of claim 6 , wherein the inter-field filtering includes applying a correction-per-exposure (CPE) model.
9. The system of claim 1 , wherein the generating of the overlay compensation further includes:
identifying and removing extra noise from the set of filtered overlay errors, prior to the calculating of the overlay compensation.
10. The system of claim 9 , wherein the identifying of the extra noise includes applying an inter-field filtering to the set of filtered overlay errors.
11. A system for overlay control, the system comprising:
a metrology tool configured to measure overlay errors associated with patterns formed on a wafer; and
a controller module configured to read the overlay errors from the metrology tool and generate an overlay compensation, wherein the generation of the overlay compensation includes:
identifying noise from the overlay errors by applying at least two filtering operations;
grouping the overlay errors that are not noise identified by applying the at least two filtering operations into a set of filtered overlay errors; and
calculating the overlay compensation from the set of filtered overlay errors.
12. The system of claim 11 , wherein the identifying the noise from the overlay errors includes dividing the overlay errors into multiple fields, and wherein the at least two filtering operations are selected from a ranking model applied to each field individually, an intra-field correction model applied to each field individually, and an inter-field correction model applied to the multiple fields collectively.
13. The system of claim 12 , wherein the identifying of the noise from the overlay errors includes:
determining outliers from the overlay errors by applying the ranking model;
determining overlay errors due to reticle effects by calculating residues according to a difference between a magnitude of each overlay error and a sum of a first value generated by the inter-field correction model and a second value generated by the intra-field correction model; and
identifying the outliers that are not overlay errors due to reticle effects as noise.
14. The system of claim 12 , wherein the inter-field correction model is a correction-per-exposure (CPE) model and the intra-field correction model is an intra-field high order process correction (iHOPC) model.
15. The system of claim 11 , wherein the generation of the overlay compensation further includes:
removing extra noise from the set of filtered overlay errors by applying another filtering operation that is different from the at least two filter operations, prior to the calculating of the overlay compensation.
16. A method for overlay monitoring and control, the method comprising:
collecting an overlay error set from a wafer patterned by a lithography system, wherein the overlay error set includes a plurality of overlay error subsets according to a field scheme of the wafer;
determining outliers from each of the plurality of overlay error subsets by applying a ranking model to the corresponding overlay error subset;
identifying inside each of the plurality of overlay error subsets the outliers that are not due to reticle effects as noise inside the corresponding overlay error subset;
forming a filtered overlay error set by excluding the noise identified inside each of the plurality of overlay error subsets; and
generating an overlay compensation from the filtered overlay error set, wherein the overlay compensation is to adjust at least one parameter of the lithography system.
17. The method of claim 16 , wherein the ranking model examines an abrupt change of magnitudes of overlay errors in each of the plurality of overlay error subsets.
18. The method of claim 16 , wherein the ranking model is applied to a selected number of overlay errors but not all of the overlay errors in each of the plurality of overlay error subsets based on empirical knowledge.
19. The method of claim 16 , wherein the identifying of the noise inside the corresponding overlay error subset includes computing residues based on a correction-per-exposure (CPE) model and an intra-field high order process correction (iHOPC) model.
20. The method of claim 19 , wherein the iHOPC model has an order selected from 2 to 5.Cited by (0)
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