Sensing amplifier, method and controller for sensing memory cell

Abstract

A sensing amplifier, coupled to at least one memory cell, includes an output terminal and a reference terminal, a multiplexer circuit, and a plurality of reference cells having equal value. An output terminal of the multiplexer circuit is coupled to the reference terminal of the sensing amplifier. Each of the reference cell is coupled to each input node of the multiplexer circuit. The multiplexer circuit is controlled by a control signal to select one of the reference cells as a selected reference cell to couple to the reference terminal of the sensing amplifier when each read operation to the at least one memory cell is performed. The plurality of reference cells are selected sequentially and repeatedly, and the one of the reference cells is selected for one read operation to the at least one memory cell.

What is claimed is: 
     
       1. A sensing amplifier, coupled to at least one memory cell,
 wherein the sensing amplifier comprising: 
 an output terminal and a reference terminal; 
 a multiplexer circuit, an output terminal thereof is coupled to the reference terminal of the sensing amplifier; and 
 a plurality of reference cells having equal value, each of the reference cell is coupled to each input node of the multiplexer circuit, 
 wherein the multiplexer circuit is controlled by a control signal to select one of the reference cells as a selected reference cell to couple to the reference terminal of the sensing amplifier when each read operation to the at least one memory cell is performed, 
 wherein the plurality of reference cells are selected sequentially and repeatedly, and the one of the reference cells is selected for one read operation to the at least one memory cell. 
 
     
     
       2. The sensing amplifier of  claim 1 , wherein the plurality of the reference cells is arranged in a column. 
     
     
       3. The sensing amplifier of  claim 1 , wherein the plurality of the reference cells is arranged in a row. 
     
     
       4. The sensing amplifier of  claim 1 , wherein the plurality of the reference cells is arranged in a matrix with multiple columns and rows. 
     
     
       5. The sensing amplifier of  claim 1 , wherein the at least one memory cell is a column of a memory array. 
     
     
       6. The sensing amplifier of  claim 1 , wherein the sensing amplifier generates a data of the at least one first memory cell on the output terminal of the sensing amplifier by comparing a data voltage of the at least one memory cell and a reference voltage of the selected reference cell. 
     
     
       7. A method for sensing memory cell, comprising:
 selecting one of first reference cells as a selected reference cell to couple to a reference terminal of a first sensing amplifier when each read operation to at least one first memory cell is performed, wherein the first reference cells have equal value; and 
 performing a read operation to the at least one first memory cell according to the selected reference cell, 
 wherein steps for performing the read operation to the at least one first memory cell according to the selected reference cell comprising:
 comparing a data voltage of the at least one first memory cell and a reference voltage of the selected reference cell; and 
 obtaining a data of the at least one first memory cell on an output terminal of the first sensing amplifier by a comparison result of the data voltage of the at least one first memory cell and the reference voltage of the selected reference cell, 
 
 wherein the first reference cells are selected sequentially and repeatedly, and the one of the first reference cells is selected for one read operation to the at least one first memory cell. 
 
     
     
       8. The method of  claim 7 , further comprising:
 selecting one of second reference cells as a selected reference cell to couple to a reference terminal of a second sensing amplifier when each read operation to at least one second memory cell is performed; and 
 performing a read operation to the at least one second memory cell according to the selected reference cell, 
 wherein steps for performing the read operation to the at least one second memory cell according to the selected reference cell comprising:
 comparing a data voltage of the at least one second memory cell and a reference voltage of the selected reference cell; and 
 obtaining a data of the at least one second memory cell on an output terminal of the second sensing amplifier by a comparison result of the data voltage of the at least one second memory cell and the reference voltage of the selected reference cell. 
 
 
     
     
       9. The method of  claim 8 , wherein the reference terminal of the second sensing amplifier is coupled to the reference terminal of the first sensing amplifier. 
     
     
       10. The method of  claim 7 , wherein the plurality of the first reference cells are arranged in a column, a row, or a matrix with multiple columns and rows. 
     
     
       11. The method of  claim 7 , wherein the at least one first memory cell is a column of a memory array. 
     
     
       12. The method of  claim 7 , further comprising:
 selecting another one of second reference cells as the selected reference cell to couple to the reference terminal of the second sensing amplifier sequentially and repeatedly in response to next read operation to at least one second memory cell is performed. 
 
     
     
       13. A controller of a multiplexer circuit for sensing memory cell,
 wherein the controller is configured to: 
 select one of first reference cells as a selected reference cell to couple to a reference terminal of a first sensing amplifier when each read operation to at least one first memory cell is performed, wherein the first reference cells have equal value; and 
 perform a read operation to the at least one first memory cell according to the selected reference cell, 
 wherein the controller performing the read operation to the at least one first memory cell according to the selected reference cell further comprising:
 compare a data voltage of the at least one first memory cell and a reference voltage of the selected reference cell; and 
 obtain a data of the at least one first memory cell on an output terminal of the first sensing amplifier by a comparison result of the data voltage of the at least one first memory cell and the reference voltage of the selected reference cell, 
 
 wherein the first reference cells are selected sequentially and repeatedly, and the one of the first reference cells is selected for one read operation to the at least one first memory cell. 
 
     
     
       14. The controller of  claim 13 , further configured to:
 select one of second reference cells as a selected reference cell to couple to a reference terminal of a second sensing amplifier when each read operation to at least one second memory cell is performed; and 
 perform a read operation to the at least one second memory cell according to the selected reference cell, 
 wherein the controller performing the read operation to the at least one second memory cell according to the selected reference cell further comprising:
 compare a data voltage of the at least one second memory cell and a reference voltage of the selected reference cell; and 
 obtain a data of the at least one second memory cell on an output terminal of the second sensing amplifier by a comparison result of the data voltage of the at least one second memory cell and the reference voltage of the selected reference cell. 
 
 
     
     
       15. The controller of  claim 14 , wherein the reference terminal of the second sensing amplifier is coupled to the reference terminal of the first sensing amplifier. 
     
     
       16. The controller of  claim 13 , wherein the plurality of the first reference cells are arranged in a column. 
     
     
       17. The controller of  claim 13 , wherein the plurality of the first reference cells are arranged in a row. 
     
     
       18. The controller of  claim 13 , wherein the plurality of the first reference cells are arranged in a matrix with multiple columns and rows. 
     
     
       19. The controller of  claim 13 , wherein the at least one first memory cell is a column of a memory array. 
     
     
       20. The controller of  claim 13 , wherein the controller controls the sensing amplifier to generate a data of the at least one first memory cell on the output terminal of the sensing amplifier by comparing a data voltage of the at least one memory cell and a reference voltage of the selected reference cell.