Semiconductor device and method for fabricating the same

Abstract

A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first inter-metal dielectric (IMD) layer around the MTJ; forming a first metal interconnection adjacent to the MTJ; forming a stop layer on the first IMD layer; removing the stop layer to form an opening; and forming a channel layer in the opening to electrically connect the MTJ and the first metal interconnection.

What is claimed is: 
     
       1. A semiconductor device, comprising:
 a first metal interconnection and a second metal interconnection on a substrate; 
 a first inter-metal dielectric (IMD) layer around the first metal interconnection and the second metal interconnection; 
 a channel layer on the first IMD layer, the first metal interconnection, and the second metal interconnection; 
 a magnetic tunneling junction (MTJ) on the channel layer; 
 a first stop layer around the channel layer, wherein the channel layer and the first stop layer are made of different materials; 
 a hard mask on the MTJ; 
 a cap layer on the channel layer and the first stop layer and adjacent to the MTJ, wherein a cross-section of the cap layer comprises an L shape; 
 a second IMD layer around the hard mask and the cap layer, wherein the cap layer and the second IMD layer comprise different materials; 
 a third metal interconnection on and directly contacting the hard mask, wherein the third metal interconnection has a planar bottom surface directly contacting a top surface of the hard mask and a top surface of the second IMD layer, and a width of the planar bottom surface of the third metal interconnection is greater than a width of the channel layer; 
 a second stop layer on the second IMD layer; and 
 a third IMD layer on the second stop layer, wherein the second stop layer is disposed adjacent to two sides of the third metal interconnection, and the second stop layer is embedded in the second IMD layer and the third IMD layer without contacting the third metal interconnection directly. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the MTJ comprises:
 a free layer on the channel layer; 
 a barrier layer on the free layer; and 
 a pinned layer on the barrier layer. 
 
     
     
       3. The semiconductor device of  claim 1 , wherein top surfaces of the channel layer and the first stop layer are coplanar. 
     
     
       4. The semiconductor device of  claim 1 , wherein the third metal interconnection is on the MTJ, the cap layer, and the second IMD layer. 
     
     
       5. The semiconductor device of  claim 1 , wherein the channel layer comprises metal.