US11784238B2ActiveUtilityA1
High electron mobility transistor
Assignee: UNITED MICROELECTRONICS CORPPriority: Sep 17, 2019Filed: Mar 28, 2022Granted: Oct 10, 2023
Est. expirySep 17, 2039(~13.2 yrs left)· nominal 20-yr term from priority
H10P 50/283H10D 62/8503H10D 64/512H10D 64/112H10D 62/852H10D 30/47H10D 30/015H10D 64/411H10D 62/343H10D 30/475H01L 29/66462H01L 29/201H01L 29/2003H01L 29/404H01L 29/778
79
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Cited by
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References
10
Claims
Abstract
A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, a barrier layer on the buffer layer, a gate electrode on the barrier layer, a field plate adjacent to two sides of the gate electrode, and a first passivation layer adjacent to two sides of the gate electrode. Preferably, a sidewall of the field plate includes a first curve.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A high electron mobility transistor (HEMT), comprising:
a buffer layer on a substrate;
a barrier layer on the buffer layer;
a gate electrode on the barrier layer;
a field plate adjacent to two sides of the gate electrode, wherein a top surface of the gate electrode is even with a top surface of the field plate and a sidewall of the field plate comprises a first curve;
a first passivation layer adjacent to two sides of the gate electrode; and
a p-type semiconductor layer between the gate electrode and the barrier layer and directly contacting the first passivation layer, wherein a sidewall of the p-type semiconductor layer comprises a second curve.
2. The HEMT of claim 1 , wherein the buffer layer comprises a group III-V semiconductor.
3. The HEMT of claim 2 , wherein the buffer layer comprises gallium nitride (GaN).
4. The HEMT of claim 1 , wherein the barrier layer comprises Al x Ga 1-x N.
5. The HEMT of claim 1 , wherein the first passivation layer comprises silicon nitride.
6. The HEMT of claim 1 , further comprising a second passivation layer between the first passivation layer and the barrier layer.
7. The HEMT of claim 6 , wherein the second passivation layer comprises aluminum nitride, aluminum oxide, silicon carbide, or silicon oxynitride.
8. The HEMT of claim 1 , wherein the p-type semiconductor layer comprises p-type gallium nitride (p-GaN).
9. The HEMT of claim 1 , wherein a bottom surface of the p-type semiconductor layer comprises a third curve.
10. The HEMT of claim 1 , wherein the field plate and the gate electrode comprise a same material.Cited by (0)
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