Die stack and integrated device structure including improved bonding structure and methods of forming the same

Abstract

A die stack includes: a first die including a first semiconductor substrate; a second die including a second semiconductor substrate; a bonding dielectric structure including a bonding polymer and that bonds the first die and the second die; a bonding interconnect structure that extends through the bonding dielectric structure to bond and electrically connect the first die and the second die; and a bonding dummy pattern that extends through the bonding dielectric structure to bond the first die and the second die. The bonding dummy pattern is electrically conductive and is electrically floated.

What is claimed is: 
     
       1. A die stack comprising:
 a first die comprising a first semiconductor substrate; 
 a second die comprising a second semiconductor substrate; 
 a bonding dielectric structure (BDS) comprising a bonding polymer, wherein the BDS bonds the first die and the second die; 
 a bonding interconnect structure (BIS) that extends through the BDS to bond and electrically connect the first die and the second die; and 
 a bonding dummy pattern (BDP) that extends through the BDS to bond the first die and the second die, wherein the BDP is electrically conductive and is electrically floated, 
 wherein a pattern density of the BDP in the BDS is from 80% to 40%. 
 
     
     
       2. The die stack of  claim 1 , wherein the BDS comprises:
 a first bonding layer covering a first surface of the first die; and 
 a second bonding layer covering a first surface of the second die and disposed on the first bonding layer. 
 
     
     
       3. The die stack of  claim 2 , wherein:
 the first bonding layer comprises the bonding polymer; and 
 the second bonding layer comprises the bonding polymer. 
 
     
     
       4. The die stack of  claim 2 , wherein:
 the first bonding layer comprises the bonding polymer; 
 the second bonding layer comprises silicon oxide, silicon nitride, or silicon oxynitride; and 
 the bonding polymer is thermally stable at a temperature of at least 350° C. 
 
     
     
       5. The die stack of  claim 4 , wherein the bonding polymer comprises an epoxy, a polyimide (PI), a benzocyclobutene (BCB), or a polybenzoxazole (PBO). 
     
     
       6. The die stack of  claim 2 , wherein:
 the BIS comprises first metal die interconnect structures disposed in the first bonding layer and second metal die interconnect structures disposed in the second bonding layer; 
 the first metal die interconnect structures are fusion bonded to respective ones of the second metal die interconnect structures; and 
 the first metal die interconnect structures and the second metal die interconnect structures comprise copper or a copper alloy. 
 
     
     
       7. The die stack of  claim 6 , wherein:
 the BDP comprises first dummy metal features disposed in the first bonding layer and second dummy metal features disposed in the second bonding layer; 
 the first dummy metal features are fusion bonded to respective ones of the second dummy metal features; and 
 the first dummy metal features and the second dummy metal features comprise copper or a copper alloy. 
 
     
     
       8. The die stack of  claim 1 , wherein:
 the BIS comprises conductive lines and is configured to operate as a redistribution layer structure; and 
 the BDP is disposed between the conductive lines of the BIS. 
 
     
     
       9. The die stack of  claim 1 , wherein a pattern density of the BDP in the BDS is from 70% to 40%. 
     
     
       10. The die stack of  claim 1 , wherein the BIS and the BDP both comprise copper or a copper alloy. 
     
     
       11. The die stack of  claim 1 , wherein:
 the first die further comprises a first interconnect structure electrically connected to the first semiconductor substrate; 
 the second die further comprises a second interconnect structure electrically connected to the second semiconductor substrate; and 
 the BIS is configured to electrically connect the first interconnect structure to the second interconnect structure. 
 
     
     
       12. A three-dimensional device structure comprising:
 a first die comprising a first semiconductor substrate; 
 a second die comprising a second semiconductor substrate; 
 a dielectric encapsulation (DE) layer disposed on a first surface of the first die and surrounding the second die; 
 a redistribution layer (RDL) structure disposed on the DE layer and the second die; 
 a through-dielectric via structure that extends through the DE layer and electrically connects the first die to the RDL structure; 
 a bonding dielectric structure (BDS) comprising a bonding polymer and that bonds the first die and the second die; 
 a bonding interconnect structure (BIS) that extends through the BDS to bond and electrically connect the first die and the second die; and 
 a bonding dummy pattern (BDP) that extends through the BDS to bond the first die and the second die, wherein the BDP is electrically conductive and is electrically floated, 
 wherein a pattern density of the BDP in the BDS is from 80% to 40%. 
 
     
     
       13. The three-dimensional device structure of  claim 12 , wherein the BDS comprises:
 a first bonding layer covering a first surface of the first die; and 
 a second bonding layer covering a first surface of the second die and disposed on the first bonding layer. 
 
     
     
       14. The three-dimensional device structure of  claim 13 , wherein:
 the first bonding layer comprises the bonding polymer; 
 the second bonding layer comprises the bonding polymer; and 
 the bonding polymer comprises an epoxy, a polyimide (PI), a benzocyclobutene (BCB), or a polybenzoxazole (PBO). 
 
     
     
       15. The three-dimensional device structure of  claim 13 , wherein:
 the first bonding layer comprises the bonding polymer; 
 the second bonding layer comprises silicon oxide, silicon nitride, or silicon oxynitride; and 
 the bonding polymer comprises an epoxy, a polyimide (PI), a benzocyclobutene (BCB), or a polybenzoxazole (PBO). 
 
     
     
       16. The three-dimensional device structure of  claim 13 , wherein:
 the first bonding layer comprises silicon oxide, silicon nitride, or silicon oxynitride; 
 the second bonding layer comprises the bonding polymer; and 
 the bonding polymer comprises an epoxy, a polyimide (PI), a benzocyclobutene (BCB), or a polybenzoxazole (PBO). 
 
     
     
       17. The three-dimensional device structure of  claim 13 , wherein:
 the BIS comprises first metal die interconnect structures disposed in the first bonding layer and second metal die interconnect structures disposed in the second bonding layer; 
 the first metal die interconnect structures are fusion bonded to respective ones of the second metal die interconnect structures; 
 the BDP comprises first dummy metal features disposed in the first bonding layer and second dummy metal features disposed in the second bonding layer; 
 the first dummy metal features are fusion bonded to respective ones of the second dummy metal features; and 
 first metal die interconnect structures, the second metal die interconnect structures, the first dummy metal features, and the second dummy metal features comprise copper or a copper alloy. 
 
     
     
       18. A method of forming a die stack, comprising:
 forming a first bonding layer, first metal die interconnect structures, and first dummy metal features on a first die comprising a first semiconductor substrate; 
 forming a second bonding layer, second metal die interconnect structures, and second dummy metal features on a second die comprising a second semiconductor substrate; 
 aligning the first die and the second die, such that the first metal die interconnect structures contact the second metal die interconnect structures, and the first dummy metal features contact the second dummy metal features; and 
 bonding the first die and the second die, such that the first metal die interconnect structures are fusion bonded to the second metal die interconnect structures and interconnect the first die and the second die, the first dummy metal features are fusion bonded to the second dummy metal features and form a bonding dummy pattern (BDP), and the first bonding layer is bonded to the second bonding layer and form a bonding dielectric structure (BDS), wherein, 
 the BDP is electrically floated, 
 the first bonding layer, the second bonding layer, or both the first bonding layer and the second bonding layer comprise a dielectric bonding polymer, and 
 a pattern density of the BDP in the BDS is from 80% to 40%. 
 
     
     
       19. The method of  claim 18 , wherein the bonding comprises pressure bonding at a temperature of less than 350° C. 
     
     
       20. The method of  claim 18 , wherein:
 the first metal die interconnect structures, the second metal die interconnect structures, the first dummy metal features, and the second dummy metal features comprise copper or a copper alloy; and 
 the dielectric bonding polymer comprises an epoxy, a polyimide (PI), a benzocyclobutene (BCB), or a polybenzoxazole (PBO).