US12131917B2ActiveUtilityA1
Manufacturing method of package structure
Est. expiryDec 7, 2040(~14.4 yrs left)· nominal 20-yr term from priority
H10P 14/69215H10P 14/6927H10W 74/147H10W 70/093H10W 70/05H10W 70/69H10W 70/692H10W 70/695H10W 20/071H10W 74/017H10W 20/0698H10P 72/744H10P 72/7424H10P 72/7412H10P 72/74H10P 50/00H01L 2224/82005H01L 23/3192H01L 21/4857H01L 21/02164H01L 21/0214H01L 21/566
68
PatentIndex Score
0
Cited by
7
References
19
Claims
Abstract
A manufacturing method of a package structure including the following steps is provided. A carrier is provided. An anti-warpage structure is formed on the carrier. And a redistribution layer is formed on the carrier. In the normal direction of the carrier, a warpage trend of the anti-warpage structure is opposite to a warpage trend of the redistribution layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A manufacturing method of a package structure, comprising:
providing a carrier;
forming an anti-warpage structure on the carrier; and
forming a redistribution layer on the carrier, wherein in a normal direction of the carrier, a warpage trend of the anti-warpage structure is opposite to a warpage trend of the redistribution layer,
wherein the anti-warpage structure comprises a first anti-warpage layer and a second anti-warpage layer, the first anti-warpage layer comprises silicon oxide, and the second anti-warpage layer comprises silicon nitride or silicon oxynitride.
2. The manufacturing method according to claim 1 , wherein the anti-warpage structure is located between the redistribution layer and the carrier.
3. The manufacturing method according to claim 1 , wherein the first anti-warpage layer of the anti-warpage structure contacts the carrier directly.
4. The manufacturing method according to claim 2 , wherein a thickness of the first anti-warpage layer of the anti-warpage structure is 0.5 μm to 1 μm.
5. The manufacturing method according to claim 2 , wherein Young's modulus of the first anti-warpage layer is greater than Young's modulus of a dielectric layer in the redistribution layer.
6. The manufacturing method according to claim 5 , wherein a value of the Young's modulus of the first anti-warpage layer of the anti-warpage structure divided by the Young's modulus of the dielectric layer in the redistribution layer is 50 to 200.
7. The manufacturing method according to claim 5 , wherein the Young's modulus of the first anti-warpage layer is 70 GPa to 100 Gpa.
8. The manufacturing method according to claim 7 , wherein the anti-warpage structure comprises an adhesion layer and a third anti-warpage layer, and the adhesion layer is located between the carrier and the third anti-warpage layer.
9. The manufacturing method according to claim 8 , wherein a thickness of the third anti-warpage layer is 10 μm to 200 μm.
10. The manufacturing method according to claim 8 , wherein Young's modulus of the third anti-warpage layer is greater than the Young's modulus of the dielectric layer in the redistribution layer.
11. The manufacturing method according to claim 10 , wherein a value of the Young's modulus of the third anti-warpage layer divided by the Young's modulus of the dielectric layer in the redistribution layer is 2 to 10.
12. The manufacturing method according to claim 10 , wherein the Young's modulus of the third anti-warpage layer is 5 GPa to 50 Gpa.
13. The manufacturing method according to claim 1 , further comprising:
forming a release layer, wherein the release layer is located between the redistribution layer and the carrier.
14. The manufacturing method according to claim 13 , wherein the release layer is located on the anti-warpage structure and contacts the anti-warpage structure directly.
15. The manufacturing method according to claim 13 , further comprising:
forming a metal layer on the release layer, wherein the metal layer is a patterned circuit layer.
16. The manufacturing method according to claim 13 , wherein the release layer and the anti-warpage structure are respectively located on opposite sides of the carrier, and the release layer contacts the carrier directly.
17. The manufacturing method according to claim 1 , wherein the redistribution layer and the anti-warpage structure are respectively located on opposite sides of the carrier.
18. The manufacturing method according to claim 1 , wherein the anti-warpage structure comprises a first anti-warpage structure and a second anti-warpage structure, and forming the anti-warpage structure on the carrier comprises:
forming the first anti-warpage structure on a first surface of the carrier; and
forming the second anti-warpage structure on a second surface of the carrier, so that the second anti-warpage structure and the first anti-warpage structure are respectively located on opposite sides of the carrier, wherein the first surface and the second surface are opposite to each other.
19. The manufacturing method according to claim 1 , wherein the carrier comprises at least one chip and a molding material.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.