Conformal oxidation for gate all around nanosheet I/O device

Abstract

Horizontal gate-all-around devices and methods of manufacturing the same are described. The hGAA devices comprise an oxidize layer on a semiconductor material between source regions and drain regions of the device. The method includes radical plasma oxidation (RPO) of semiconductor material layers between source regions and drain regions of an electronic device.

What is claimed is: 
     
       1. A method of forming a semiconductor device, comprising:
 selectively etching a superlattice structure comprising a plurality of first layers and a corresponding plurality of second layers alternatingly arranged in a plurality of stacked pairs to remove each of the second layers to form a plurality of voids in the superlattice structure, the plurality of first layers extending between a source region and a drain region, and each of the plurality of first layers separated by a silicon oxide (SiOx) inner spacer; 
 pre-cleaning the plurality of first layers and silicon oxide (SiOx) inner spacer to remove native oxide and/or residues; and 
 conformally forming an oxide layer on the plurality of first layers and converting the silicon oxide (SiOx) inner spacer to a low-k dielectric inner spacer by radical plasma oxidation (RPO) of the plurality of first layers and the silicon oxide (SiOx) inner spacer, the radical plasma oxidation occurring at a temperature in a range of from about 700° C. to about 900° C. in an atmosphere of hydrogen (H 2 ) gas and oxygen (O 2 ) gas at ambient pressure, 
 wherein the method is performed in a processing chamber without breaking vacuum. 
 
     
     
       2. The method of  claim 1 , further comprising forming the source region adjacent a first end of the superlattice structure and the drain region adjacent a second opposing end of the superlattice structure. 
     
     
       3. The method of  claim 1 , further comprising forming the superlattice structure on a top surface of a substrate. 
     
     
       4. The method of  claim 1 , wherein semiconductor device comprises a horizontal gate-all-around device. 
     
     
       5. The method of  claim 1 , wherein the first layers comprise silicon (Si) and the second layers comprise silicon germanium (SiGe). 
     
     
       6. The method of  claim 5 , wherein selectively etching the superlattice structure comprises etching the silicon germanium (SiGe) first layers and leaving the silicon (Si) second layers. 
     
     
       7. The method of  claim 5 , wherein the oxide layer comprises silicon oxide (SiO x ). 
     
     
       8. The method of  claim 1 , wherein a thickness of the first layers and the second layers are each about 3 nm to about 20 nm. 
     
     
       9. The method of  claim 1 , further comprising:
 forming a high-k dielectric layer on the oxide layer; and 
 forming a conductive layer on the high k dielectric layer. 
 
     
     
       10. The method of  claim 9 , wherein the high-k dielectric comprises hafnium oxide and the conductive layer comprises one or more of titanium nitride (TiN), tungsten (W), cobalt (Co), and aluminum (Al). 
     
     
       11. A non-transitory computer readable medium, having instructions stored thereon which, when executed, cause a method of forming a semiconductor device, the method comprising:
 selectively etch a superlattice structure comprising a plurality of first layers and a corresponding plurality of second layers alternatingly arranged in a plurality of stacked pairs to remove each of the second layers to form a plurality of voids in the superlattice structure, and the plurality of first layers extending between a source region and a drain region, and each of the plurality of first layers separated by a silicon oxide (SiOx) inner spacer; 
 pre-clean the plurality of first layers and the silicon oxide (SiOx) inner spacer to remove native oxide and/or residues; and 
 conformally form an oxide layer on the plurality of first layers and convert the silicon oxide (SiOx) inner spacer to a low-k dielectric inner spacer using radical plasma oxidation of the plurality of first layers and the silicon oxide (SiOx) inner spacer, the radical plasma oxidation occurring at a temperature in a range of from about 700° C. to about 900° C. in an atmosphere of hydrogen (H 2 ) gas and oxygen (O 2 ) gas at ambient pressure, 
 wherein the oxide layer has an oxide layer thickness and the first layer has a first layer thickness and the ratio of the oxide layer thickness to the first layer thickness is about 3:1, and 
 wherein the method is performed in a processing chamber without breaking vacuum. 
 
     
     
       12. The method of  claim 1 , wherein the oxide layer has an oxide layer thickness and the first layer has a first layer thickness and the ratio of the oxide layer thickness to the first layer thickness is 3:1. 
     
     
       13. The non-transitory computer readable medium of  claim 11 , wherein the oxide layer has an oxide layer thickness and the first layer has a first layer thickness and the ratio of the oxide layer thickness to the first layer thickness is 3:1.