US12493072B2ActiveUtilityA1

System and method for identifying design faults or semiconductor modeling errors by analyzing failed transient simulation of an integrated circuit

79
Assignee: BAYES ELECTRONICS TECH CO LTDPriority: Dec 17, 2019Filed: Dec 14, 2020Granted: Dec 9, 2025
Est. expiryDec 17, 2039(~13.4 yrs left)· nominal 20-yr term from priority
Inventors:Gang Fang
G01R 31/2812G01R 31/31705G01R 27/28G01R 31/2848G06F 30/367
79
PatentIndex Score
1
Cited by
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References
20
Claims

Abstract

A method for detecting non-convergence error in a transient circuit simulation wherein a circuit netlist and control statements associated with a circuit for the transient circuit simulation are received. A transient circuit simulation is performed responsive to a time point. Whether a non-convergence error has occurred during transient circuit simulation is determined. A transient debug mode is actuated responsive to determination of occurrence of the non-convergence error. The steps of performing the transient circuit simulation and determining whether a non-convergence error has occurred are repeated after actuation of the transient debug mode. Results of the transient circuit simulation are provided responsive to a determination of non-occurrence of a non-convergence error.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for detecting non-convergence error in a transient circuit simulation, comprises:
 a) receiving a circuit netlist describing component model connections for a circuit and control statements defining device parameter tolerances associated with the circuit for use in the transient circuit simulation for the circuit at a circuit simulator;   b) performing the transient circuit simulation for the circuit responsive to a selected time point, the circuit netlist and the control statements at the circuit simulator;   c) determining whether a non-convergence error has occurred during the transient circuit simulation for the circuit;   d) actuating a transient debug mode within the circuit simulator responsive to determination of occurrence of the non-convergence error by the circuit simulator;   e) repeating steps b)-c) after actuation of the transient debug mode within the circuit simulator, wherein the selected time point comprises a saved last good time point stored responsive to a successful convergence from performance of a previous transient circuit simulation for the circuit by the circuit simulator;   f) identifying at least one bad model device instance within the circuit netlist that is causing the non-convergence error responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator;   g) identifying a particular fault causing the non-convergence error responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator;   h) identifying a particular node where the non-convergence error occurs responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator; and   i) correcting a base parametric device model for the circuit to provide a modified device model for the circuit that allows simulation computations to converge, wherein the step of correcting further comprises:
 (j) acquiring a corrected device model that is linear when the base parametric device model is operating out of range; 
 (k) determining a boundary of a normal operating range of the corrected device model; 
 (l) selecting a first order linear polynomial or a second order linear polynomial for updating the corrected device model responsive to the determined boundary; 
 (m) computing parameters for the corrected device model responsive to the first order linear polynomial or the second order linear polynomial 1; and 
 (n) generating the modified device model responsive to the corrected device model and the computed parameters. 
   
     
     
         2 . The method of  claim 1 , wherein the step of performing further comprises:
 a) determining whether the transient debug mode has been actuated at the circuit simulator;   b) performing the transient circuit simulation responsive to the selected time point associated with the received circuit netlist and control statements if the transient debug mode has not been actuated at the circuit simulator;   c) performing the transient circuit simulation responsive to the saved last good time point when the transient debug mode has been actuated at the circuit simulator using the transient debug mode;   d) determining whether a convergence or a non-convergence has occurred responsive to the transient circuit simulation at the circuit simulator;   e) saving a new saved last good time point if the convergence has occurred in a memory; and   f) repeating steps c)-e) until the non-convergence occurs at the circuit simulator.   
     
     
         3 . The method of  claim 2 , wherein the step of performing the transient circuit simulation responsive to the saved last good time point further comprises:
 predicting a time step for a next time point responsive to the saved last good time point at the circuit simulator using the transient debug mode; and   solving nonlinear circuit equations for the next time point responsive to the circuit netlist describing the component model connections and the control statements defining the device parameter tolerances at the circuit simulator using the transient debug mode.   
     
     
         4 . The method of  claim 3 , wherein the step of solving further comprises:
 determining nonlinear device instances in the circuit at the circuit simulator using the transient debug mode;   forming a linear system of equations based on the determined nonlinear device instances responsive to the circuit netlist describing the component model connections and the control statements defining the device parameter tolerances at the circuit simulator using the transient debug mode; and   solving the linear system of equations to indicate if the convergence or the non-convergence has occurred at the circuit simulator using the transient debug mode.   
     
     
         5 . The method of  claim 2 , wherein the step of identifying further comprises:
 determining a residue criteria and an update criteria for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode;   determining if the residue criteria and the update criteria are satisfied for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode; and   establishing a type of the non-convergence error responsive to the determination of whether the residue criteria and the update criteria are satisfied for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode.   
     
     
         6 . The method of  claim 5 , wherein the step of establishing further comprises:
 performing a linearity check of devices connected to each node as defined by the circuit netlist describing the component model connections that fails to satisfy the residue criteria and the update criteria at the circuit simulator using the transient debug mode; and   reporting a bad model device instance for each device that fails the linearity check at the circuit simulator using the transient debug mode.   
     
     
         7 . The method of  claim 5 , wherein the step of establishing further comprises:
 determining a conductance for each non-linear device instance connected to each node of the circuit as defined by the circuit netlist describing the component model connections that fails to satisfy the residue criteria at the circuit simulator using the transient debug mode; and   reporting a short circuit case if any determined conductance exceeds a predetermined threshold at the circuit simulator using the transient debug mode.   
     
     
         8 . The method of  claim 5 , wherein the step of establishing further comprises:
 determining a floating node case check value of a corresponding diagonal element for a conductance matrix for each node of the circuit as defined by the circuit netlist describing the component model connections that fails to satisfy the update criteria at the circuit simulator using the transient debug mode; and   reporting a floating node case if any determined floating node case check value is smaller than a predetermined threshold at the circuit simulator using the transient debug mode.   
     
     
         9 . The method of  claim 1  further comprising correcting the identified causes of the non-convergence error within the circuit netlist responsive to the identified at least one bad model device instance within the circuit netlist, the identified particular fault and the identified particular node. 
     
     
         10 . A system for detecting non-convergence error in a transient circuit simulation, comprises:
 a circuit simulator configured to run the transient circuit simulation on a circuit;   a memory for storing a last good time point of the transient circuit simulation;   a non-convergence detector having a transient debug mode therein implemented within the circuit simulator configured to detect the non-convergence error during the transient circuit simulation, wherein the non-convergence detector is further configured to:
 a) receive a circuit netlist describing a component model connections for the circuit and control statements defining device parameter tolerances associated with the circuit for use in the transient circuit simulation for the circuit at the circuit simulator; 
 b) perform the transient circuit simulation for the circuit responsive to a selected time point, the circuit netlist and the control statements at the circuit simulator; 
 c) determine whether a non-convergence error has occurred during the transient circuit simulation for the circuit; 
 d) actuate the transient debug mode within the circuit simulator responsive to determination of occurrence of the non-convergence error by the circuit simulator; 
 e) repeat steps b)-c) after actuation of the transient debug mode within the circuit simulator, wherein the selected time point comprises a saved last good time point stored responsive to a successful convergence from performance of a previous transient circuit simulation for the circuit by the circuit simulator; 
 f) identify at least one bad model device instance within the circuit netlist that is causing the non-convergence error responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator, wherein the non-convergence detector is further configured to: 
 g) identify a particular fault causing the non-convergence error responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator; 
 h) identify a particular node where the non-convergence error occurs responsive to execution of the transient debug mode from the saved last good time point by the circuit simulator; and 
 i) correct a base parametric device model for the circuit to provide a modified device model for the circuit that allows simulation computations to converge, wherein the step of correcting further comprises:
 (j) acquire a corrected device model that is linear when the base parametric device model is operating out of range; 
 (k) determine a boundary of a normal operating range of the corrected device model; 
 (l) select a first order linear polynomial or a second order linear polynomial for updating the corrected device model responsive to the determined boundary; 
 (m) compute parameters for the corrected device model responsive to the first order linear polynomial or the second order linear polynomial 1; and 
 (n) generate the modified device model responsive to the corrected device model and the computed parameters. 
 
   
     
     
         11 . The system of  claim 10 , wherein the non-convergence detector when performing the transient circuit simulation is further configured to:
 a) determine whether the transient debug mode has been actuated at the circuit simulator;   b) perform the transient circuit simulation responsive to the selected time point associated with the received circuit netlist and control statements if the transient debug mode has not been actuated at the circuit simulator;   c) perform the transient circuit simulation responsive to the saved last good time point when the transient debug mode has been actuated at the circuit simulator using the transient debug mode;   d) determine whether a convergence or a non-convergence has occurred responsive to the transient circuit simulation at the circuit simulator; and   e) save a new saved last good time point if the convergence has occurred in the memory; and   f) repeat steps c)-e) until the non-convergence occurs at the circuit simulator.   
     
     
         12 . The system of  claim 11 , wherein the non-convergence detector when performing the transient circuit simulation responsive to the saved last good time point is further configured to:
 predict a time step for a next time point responsive to the saved last good time point at the circuit simulator using the transient debug mode; and   solve nonlinear circuit equations for the next time point responsive to the circuit netlist describing the component model connections and the control statements defining the device parameter tolerances at the circuit simulator using the transient debug mode.   
     
     
         13 . The system of  claim 12 , wherein the non-convergence detector when solving the nonlinear circuit equations is further configured to:
 determine nonlinear device instances in the circuit at the circuit simulator using the transient debug mode;   form a linear system of equations based on the determined nonlinear device instances responsive to the circuit netlist describing the component model connections and the control statements defining the device parameter tolerances at the circuit simulator using the transient debug mode; and   solve the linear system of equations to indicate if the convergence or the non-convergence has occurred at the circuit simulator using the transient debug mode.   
     
     
         14 . The system of  claim 11 , wherein the non-convergence detector when identifying the at least one bad model device instance within the circuit netlist that is causing the non-convergence error is further configured to:
 determine a residue criteria and an update criteria for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode;   determine if the residue criteria and the update criteria are satisfied for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode; and   establish a type of the non-convergence error responsive to the determination of whether the residue criteria and the update criteria are satisfied for each node in the circuit as defined by the circuit netlist describing the component model connections at the circuit simulator using the transient debug mode.   
     
     
         15 . The system of  claim 14 , wherein the non-convergence detector when establishing the type of the non-convergence error is further configured to:
 perform a linearity check of devices connected to each node as defined by the circuit netlist describing the component model connections that fails to satisfy the residue criteria and the update criteria at the circuit simulator using the transient debug mode; and   report a bad model device instance for each device that fails the linearity check at the circuit simulator using the transient debug mode.   
     
     
         16 . The system of  claim 14 , wherein the non-convergence detector when establishing the type of the non-convergence error is further configured to:
 determine a conductance for each non-linear device instance connected to each node of the circuit as defined by the circuit netlist describing the component model connections that fails to satisfy the residue criteria at the circuit simulator using the transient debug mode; and   report a short circuit case if any determined conductance exceeds a predetermined threshold at the circuit simulator using the transient debug mode.   
     
     
         17 . The system of  claim 14 , wherein the non-convergence detector when establishing the type of the non-convergence error is further configured to:
 determine a floating node case check value of a corresponding diagonal element for a conductance matrix for each node of the circuit as defined by the circuit netlist describing the component model connections that fails to satisfy the update criteria at the circuit simulator using the transient debug mode; and   report a floating node case if any determined floating node case check value is smaller than a predetermined threshold at the circuit simulator using the transient debug mode.   
     
     
         18 . A method for detecting non-convergence error in a transient circuit simulation, comprises:
 receiving a circuit netlist describing component model connections for a circuit and control statements defining device parameter tolerances associated with the circuit for use in the transient circuit simulation for the circuit at a circuit simulator;   performing the transient circuit simulation for the circuit responsive to a selected time point, the circuit netlist and the control statements at the circuit simulator;   determining whether a non-convergence error has occurred during the transient circuit simulation for the circuit;   actuating a transient debug mode within the circuit simulator responsive to determination of occurrence of the non-convergence error by the circuit simulator;   performing a second transient circuit simulation for the circuit using the circuit simulator in the transient debug mode responsive to a saved last good time point stored responsive to a successful convergence from performance of a previous transient circuit simulation for the circuit, the circuit netlist and the control statements;   determining whether the non-convergence error is caused by one of a bad model, high impedance and a short circuit responsive to execution of the circuit simulator in the transient debug mode responsive to the saved last good time point;   determining a node causing the non-convergence error responsive to execution of the circuit simulator in the transient debug mode responsive to the saved last good time point; and   correcting a base parametric device model for the circuit to provide a modified device model for the circuit that allows simulation computations to converge.   
     
     
         19 . The method of  claim 1 , wherein the step of determining a cause of the non-convergence error further comprises:
 recording data associated with execution of the transient circuit simulation during execution of the transient debug mode at the circuit simulator using the transient debug mode;   detecting a first occurrence of the non-convergence error during execution of the transient debug mode at the circuit simulator using the transient debug mode; and   determining the cause of the non-convergence error from the recorded data at the circuit simulator using the transient debug mode.   
     
     
         20 . The system of  claim 10 , wherein the non-convergence detector when performing the transient circuit simulation is further configured to:
 record data associated with execution of a second transient circuit simulation during execution of the transient debug mode at the circuit simulator using the transient debug mode;   detect a first occurrence of the non-convergence error during execution of the transient debug mode at the circuit simulator using the transient debug mode; and   determine a cause of the non-convergence error from the recorded data at the circuit simulator using the transient debug mode.

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