Method for making elevated source-drain structure of PMOS in FDSOI process

Abstract

This application discloses a method for making an elevated source-drain structure of a PMOS in an FDSOI process, including: Step 1, forming a gate structure of a PMOS on an FDSOI substrate; Step 2, forming an elevated source-drain structure, further including: Step 21, forming a seed layer; Step 22, forming a bulk layer, the bulk layer being a B—Ge-doped Si epitaxial layer. Step 23, forming a first cap layer and a second cap layer in sequence, the first cap layer being a B-doped Si epitaxial layer, the second cap layer being a Si epitaxial layer; Step 24, performing a thermal oxidation process to form a top oxide layer and diffuse B impurities from the first cap layer into the bulk layer, the seed layer and the bottom semiconductor substrate; Step 25, removing the top oxide layer; and Step 26, forming a third cap layer.

What is claimed is: 
     
         1 . A method for making an elevated source-drain structure of a PMOS device in an FDSOI process, comprising:
 Step  1 , providing an FDSOI substrate and forming a gate structure of the PMOS device on the FDSOI substrate, wherein the FDSOI substrate comprises a bottom semiconductor substrate, a buried insulating dielectric layer, and a top semiconductor substrate, wherein the buried insulating dielectric layer is disposed between the bottom semiconductor substrate and the top semiconductor substrate;   forming a channel region on the top semiconductor substrate under the gate structure; and   Step  2 , forming an elevated source-drain structure at two sides of the gate structure in a self-aligning way, wherein Step  2  further comprises:   Step  2 . 1 , performing an epitaxial growth to form a seed layer on surfaces of the top semiconductor substrate at the two sides of the gate structure;   Step  2 . 2 , performing epitaxial growth to form a bulk layer on a surface of the seed layer, wherein the bulk layer is a B—Ge-doped Si epitaxial layer, wherein an increase of a Ge doping concentration of the bulk layer inhibits an increase of a B doping concentration during the epitaxial growth;   Step  2 . 3 , performing an epitaxial growth to form a first cap layer on a surface of the bulk layer and a second cap layer on the first cap layer,   wherein the first cap layer is a B-doped Si epitaxial layer and the second cap layer is a Si epitaxial layer,   wherein a B doping concentration in the first cap layer is larger than a B doping concentration in the bulk layer, wherein B impurities in the first cap layer serve as a B source to diffuse into the bulk layer so as to increase the B doping concentration of the bulk layer;   Step  2 . 4 , performing a thermal oxidation process,   wherein the thermal oxidation process oxidizes the second cap layer and the first cap layer, wherein the bulk layer is not oxidized or only its top is oxidized, wherein the oxidized first cap layer, the oxidized second cap layer, and the oxidized top of the bulk layer, constitute a resultant top oxide layer, wherein the resultant top oxide layer comprises SiO 2 ,   wherein the thermal oxidation process diffuses the B impurities from the first cap layer into the bulk layer, the seed layer, and the top semiconductor substrate, so as to increase B doping concentrations in the bulk layer, the seed layer, and the top semiconductor substrate, thereby reducing a source-drain electric resistance, wherein the B impurities are confined below the resultant top oxide layer and above the buried insulating dielectric layer;   Step  2 . 5 , removing the resultant top oxide layer; and   Step  2 . 6 , performing an epitaxial growth to form a third cap layer on the surface of the bulk layer, wherein the third cap layer is a B-doped Si epitaxial layer, and stacking the seed layer, the bulk layer, and the third cap layer to form the elevated source-drain structure.   
     
     
         2 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, if the top of the bulk layer is oxidized in Step  2 . 4 , then Step  2 . 2  further comprises increasing by an additional thickness on the bulk layer to compensate a depleted thickness due to oxidation on its top. 
     
     
         3 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 2 , wherein, in Step  2 . 4 , the thermal oxidation process diffuses B impurities and Ge impurities from the oxidized top of the bulk layer to an unoxidized region of the bulk layer at the bottom, the seed layer, and the top semiconductor substrate, to increase the B doping concentration and the Ge doping concentration in the unoxidized region of the bulk layer, the seed layer, and the top semiconductor substrate. 
     
     
         4 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  2 , the Ge concentration of the epitaxial growth of the bulk layer is configured to be within a range of 20% to 45%. 
     
     
         5 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein the first cap layer has a thickness in a range of 100 Å-200 Å and the B doping concentration is in a range of 2e 20 cm −3 -1e 21 cm −3 . 
     
     
         6 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein the second cap layer has a thickness in a range of 100 Å-200 Å. 
     
     
         7 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein the third cap layer has a thickness in a range of 100 Å-200 Å and a B doping concentration of the third cap layer is in a range of 2e 20 cm −3 -1e 21 cm −3 . 
     
     
         8 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  2 . 1 , the seed layer is a B—Ge-doped Si epitaxial layer, the seed layer has a B doping concentration lower than a B doping concentration of the bulk layer, wherein the seed layer has a Ge doping concentration that is lower than the Ge doping concentration of the bulk layer, and wherein the seed layer reduces defects from a lattice mismatch between the top semiconductor substrate and the bulk layer. 
     
     
         9 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  2 . 2 , during the performing the epitaxial growth to form the bulk layer, a Ge source gas includes GeH 4  and a B source gas includes B 2 H 6 , wherein increasing a flow rate of GeH 4  limits a reaction between B 2 H 6  and the top semiconductor substrate, thereby inhibiting an increase of the B doping concentration. 
     
     
         10 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  1 , the bottom semiconductor substrate comprises silicon, the buried insulating dielectric layer comprises silicon dioxide, and the top semiconductor substrate comprises silicon. 
     
     
         11 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  2 . 4 , the thermal oxidation process comprises dry-oxygen oxidation. 
     
     
         12 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  2 . 5 , a SiCoNi cleaning process is performed to remove the resultant top oxide layer. 
     
     
         13 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , further comprising: forming a metal silicide on a surface of the third cap layer. 
     
     
         14 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 13 , wherein the metal silicide comprises NiSi. 
     
     
         15 . The method for making the elevated source-drain structure of the PMOS in the FDSOI process according to  claim 1 , wherein, in Step  1 , the gate structure comprises a gate dielectric layer, a gate conductive material layer, and sidewalls formed at sides of the gate structure.