Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby

Abstract

A sidewall of an underlying gallium nitride layer is laterally grown into a trench in the underlying gallium nitride layer, to thereby form a lateral gallium nitride semiconductor layer. Microelectronic devices may then be formed in the lateral gallium nitride layer. Dislocation defects do not significantly propagate laterally from the sidewall into the trench in the underlying gallium nitride layer, so that the lateral gallium nitride semiconductor layer is relatively defect free. Moreover, the sidewall growth may be accomplished without the need to mask portions of the underlying gallium nitride layer during growth of the lateral gallium nitride layer. The defect density of the lateral gallium nitride semiconductor layer may be further decreased by growing a second gallium nitride semiconductor layer from the lateral gallium nitride layer. In one embodiment, the lateral gallium nitride layer is masked with a mask that includes an array of openings therein. The lateral gallium nitride layer is then grown through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. In another embodiment, the lateral gallium nitride layer is grown vertically. A plurality of second sidewalls are formed in the vertically grown gallium nitride layer to define a plurality of second trenches. The plurality of second sidewalls of the vertically grown gallium nitride layer are then laterally grown into the plurality of second trenches, to thereby form a second lateral gallium nitride layer. Microelectronic devices are then formed in the gallium nitride semiconductor layer.

That which is claimed  
     
         1 . A method of fabricating a gallium nitride semiconductor layer comprising the step of: 
 laterally growing a sidewall of an underlying gallium nitride layer into a trench in the underlying gallium nitride layer to thereby form a lateral gallium nitride semiconductor layer.    
     
     
         2 . A method according to    claim 1    wherein the laterally growing step is followed by the step of forming microelectronic devices in the lateral gallium nitride semiconductor layer.  
     
     
         3 . A method according to    claim 1    wherein the laterally growing step comprises the step of growing a pair of sidewalls of the underlying gallium nitride layer into a trench in the underlying gallium nitride layer between the pair of sidewalls until the grown pair of sidewalls coalesce in the trench.  
     
     
         4 . A method according to    claim 1    wherein the laterally growing step comprises the step of laterally growing the sidewall of the underlying gallium nitride layer using metalorganic vapor phase epitaxy.  
     
     
         5 . A method according to    claim 1    wherein the laterally growing step is preceded by the step of forming the underlying gallium nitride layer including the sidewall on a substrate.  
     
     
         6 . A method according to    claim 5    wherein the forming step comprises the steps of: 
 forming a buffer layer on a substrate; and  
 forming the underlying gallium nitride layer on the buffer layer opposite the substrate.  
 
     
     
         7 . A method according to    claim 5    wherein the forming step comprises the step of forming the trench in the underlying gallium nitride layer, the trench including the sidewall.  
     
     
         8 . A method according to    claim 5    wherein the forming step comprises the step of forming a post on the underlying gallium nitride layer, the post including the sidewall and defining the trench.  
     
     
         9 . A method according to    claim 1    wherein the underlying gallium nitride layer includes a predetermined defect density, and wherein the step of laterally growing a sidewall of an underlying gallium nitride layer into a trench in the underlying gallium nitride layer to thereby form a lateral gallium nitride layer comprises the steps of: 
 laterally growing the sidewall of the underlying gallium nitride layer to thereby form the lateral gallium nitride layer of lower defect density than the predetermined defect density; and  
 vertically growing the lateral gallium nitride layer while propagating the lower defect density.  
 
     
     
         10 . A method according to    claim 1    wherein the growing step comprises the step of growing the sidewall of the underlying gallium nitride layer using metalorganic vapor phase epitaxy of triethylgallium at 13-39 μmol/min and ammonia at 1500 sccm at a temperature of 1000° C.-1100° C.  
     
     
         11 . A method according to    claim 7    wherein the trench forming step comprises the step of selectively etching the underlying gallium nitride layer to form the trench that includes the sidewall.  
     
     
         12 . A method according to    claim 8    wherein the post forming step comprises the step of selectively growing the underlying gallium nitride layer to form the post including the sidewall.  
     
     
         13 . A gallium nitride semiconductor structure comprising: 
 an underlying gallium nitride layer including a trench having a sidewall; and    a lateral gallium nitride layer that extends from the sidewall of the underlying gallium nitride layer into the trench.    
     
     
         14 . A structure according to    claim 13    further comprising: 
 a vertical gallium nitride layer that extends from the lateral gallium nitride layer.  
 
     
     
         15 . A structure according to    claim 13    further comprising: 
 a plurality of microelectronic devices in the vertical gallium nitride layer.  
 
     
     
         16 . A structure according to    claim 13    further comprising a substrate, and wherein the underlying gallium nitride layer is on the substrate.  
     
     
         17 . A structure according to    claim 16    further comprising a buffer layer between the substrate and the underlying gallium nitride layer.  
     
     
         18 . A structure according to    claim 13    wherein the trench includes a pair of the sidewalls, and wherein the lateral gallium nitride layer extends from the pair of sidewalls to define a continuous lateral gallium nitride.  
     
     
         19 . A structure according to    claim 13    wherein the underlying gallium nitride layer includes a post thereon, the post including the sidewall and defining the trench.  
     
     
         20 . A structure according to    claim 13    wherein the underlying gallium nitride layer includes a predetermined defect density, wherein the lateral gallium nitride layer is of lower defect density than the predetermined defect density.  
     
     
         21 . A method of fabricating a gallium nitride semiconductor layer comprising the step of: 
 laterally growing a plurality of sidewalls of an underlying gallium nitride layer into a plurality of trenches in the underlying gallium nitride layer to thereby form a lateral gallium nitride layer.    
     
     
         22 . A method according to    claim 21    wherein the laterally growing step is followed by the steps of: 
 masking the lateral gallium nitride layer with a mask that includes an array of openings therein; and  
 growing the lateral gallium nitride layer through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer.  
 
     
     
         23 . A method according to    claim 21    wherein the growing step is followed by the steps of: 
 vertically growing the lateral gallium nitride layer;  
 forming a plurality of second sidewalls in the vertically grown lateral gallium nitride layer to define a plurality of second trenches; and  
 laterally growing the plurality of second sidewalls of the vertically grown lateral gallium nitride layer into the plurality of second trenches, to thereby form a second lateral gallium nitride semiconductor layer.  
 
     
     
         24 . A method according to    claim 22    wherein the laterally growing step is followed by the step of forming microelectronic devices in the overgrown gallium nitride semiconductor layer.  
     
     
         25 . A method according to    claim 23    wherein the step of laterally growing the plurality of second sidewalls is followed by the step of forming microelectronic devices in the second lateral gallium nitride semiconductor layer.  
     
     
         26 . A method according to    claim 21    wherein the laterally growing step comprises the step of growing the plurality of sidewalls of the underlying gallium nitride layer into the plurality of trenches in the underlying gallium nitride layer until the plurality of grown sidewalls coalesce in the trenches.  
     
     
         27 . A method according to    claim 22    wherein the growing step comprises the step of growing the lateral gallium nitride layer through the array of openings and onto the mask until the grown lateral gallium nitride layer coalesces on the mask to form a continuous overgrown gallium nitride semiconductor layer.  
     
     
         28 . A method according to    claim 23    wherein the step of laterally growing the plurality of second sidewalls comprises the step of laterally growing the plurality of second sidewalls of the vertically grown lateral gallium nitride layer into the plurality of second trenches until the plurality of laterally grown second sidewalls coalesce in the plurality of second trenches.  
     
     
         29 . A method according to    claim 21    wherein the laterally growing step comprises the step of laterally growing the plurality of sidewalls of the underlying gallium nitride layer using metalorganic vapor phase epitaxy.  
     
     
         30 . A method according to    claim 21    wherein the laterally growing step is preceded by the step of forming the underlying gallium nitride layer including the plurality of sidewalls on a substrate.  
     
     
         31 . A method according to    claim 30    wherein the forming step comprises the steps of: 
 forming a buffer layer on a substrate; and  
 forming the underlying gallium nitride layer on the buffer layer opposite the substrate.  
 
     
     
         32 . A method according to    claim 30    wherein the forming step comprises the step of forming the plurality of trenches in the underlying gallium nitride layer, the plurality of trenches including the plurality of sidewalls.  
     
     
         33 . A method according to    claim 30    wherein the forming step comprises the step of forming a plurality of posts in the underlying gallium nitride layer, the plurality of posts including the plurality of sidewalls and defining the plurality of trenches.  
     
     
         34 . A method according to    claim 21    wherein the underlying gallium nitride layer includes a predetermined defect density, and wherein the step of laterally growing a plurality of sidewalls of the underlying gallium nitride layer into the plurality of trenches in the underlying gallium nitride layer to thereby form a lateral gallium nitride layer comprises the steps of: 
 laterally growing the plurality of sidewalls of the underlying gallium nitride layer into the plurality of trenches to thereby form a lateral gallium nitride semiconductor layer of lower defect density than the predetermined defect density; and  
 vertically growing the laterally gallium nitride layer while propagating the lower defect density.  
 
     
     
         35 . A method according to    claim 21    wherein the laterally growing step comprises the step of laterally growing the plurality of sidewalls of the underlying gallium nitride layer using metalorganic vapor phase epitaxy of triethylgallium at 13-39 μmol/min and ammonia at 1500 sccm at a temperature of 1000° C.-1100° C.  
     
     
         36 . A gallium nitride semiconductor structure comprising: 
 an underlying gallium nitride layer including a plurality of trenches have a plurality of sidewalls; and 
 a lateral gallium nitride layer that extends from the plurality of sidewalls of the underlying gallium nitride layer into the plurality of trenches.  
   
     
     
         37 . A structure according to    claim 36    further comprising: 
 a mask including an array of openings therein on the lateral gallium nitride layer; and  
 a vertical gallium nitride layer that extends from the lateral gallium nitride layer, through the openings and onto the mask.  
 
     
     
         38 . A structure according to    claim 36    further comprising: 
 a vertical gallium nitride layer that extends from the lateral gallium nitride layer, wherein the vertical gallium nitride layer includes a plurality of second sidewalls therein; and  
 a second lateral gallium nitride layer that extends from the plurality of second sidewalls.  
 
     
     
         39 . A structure according to    claim 37    further comprising: 
 a plurality of microelectronic devices in the lateral gallium nitride layer.  
 
     
     
         40 . A structure according to    claim 38    further comprising: 
 a plurality of microelectronic devices in the second lateral gallium nitride layer.  
 
     
     
         41 . A structure according to    claim 36    further comprising a substrate, and wherein the underlying gallium nitride layer is on the substrate.  
     
     
         42 . A structure according to    claim 41    further comprising a buffer layer between the substrate and the underlying gallium nitride layer.  
     
     
         43 . A structure according to    claim 36    wherein the lateral gallium nitride layer extends from the plurality of sidewalls into the plurality of trenches to define a continuous lateral gallium nitride layer in the trenches.  
     
     
         44 . A structure according to    claim 36    wherein the underlying gallium nitride layer includes a plurality of posts thereon, the plurality of posts including the plurality of sidewalls and defining the plurality of trenches.  
     
     
         45 . A structure according to    claim 36    wherein the underlying gallium nitride layer includes a predetermined defect density and wherein the lateral gallium nitride layer is of lower defect density than the predetermined defect density.