Polysilicon resistor having adjustable temperature coefficients and the method of making the same

Abstract

A polysilicon resistor is formed using a late implant process. Low dopant concentrations on the order of 6×10 19 to 3.75×10 20 have shown good results. with a reduced post anneal temperature. Both the first and second order temperature coefficients (TC1 and TC2) can then be adjusted. Using electrical trimming resistors can be produced with highly linear temperature characteristics. By varying the geometries of the resistors, low trimming threshold current densities and voltages can be used to produce good results.

What is claimed is:  
     
         1 . A resistor having a resistance that can be adjusted by current being passed there through and which is formed as part of a semiconductor device comprising: 
 a polycrystalline silicon resistor formed of on a layer, wherein said polysilicon resistor is formed using a doping wherein said doping has a concentration of from ˜6×10 19  cm −3  to ˜3.75×10 20  cm −3 .    
     
     
         2 . A resistor having a resistance that can be adjusted by current being passed there through and which is formed as part of a semiconductor device comprising: 
 a polycrystalline silicon resistor formed of on a layer, wherein said polysilicon resistor is formed using a doping wherein said doping has a concentration of less than ˜3.75×10 20  cm −3 .    
     
     
         3 . A method of making a polysilicon resistor comprising the steps of: 
 providing a substrate,    depositing a polycrystalline layer on said substrate,    aligning and exposing a poly resistor mask,    poly doping the polycrystalline layer,    forming an insulating oxide,    aligning and exposing the mask for the resistor,    depositing an inter level dielectric,    annealing the inter level dielectric, and    completing the processing using low temperature processing.    
     
     
         4 . A method as in  claim 3  wherein said first annealing step occurs at or below 900° C.  
     
     
         5 . A method as in  claim 3  wherein said formation of said insulating oxide occurs at or below 950° C.  
     
     
         6 . A method as in  claim 3  wherein said ion implantation to provide the poly doping results in a concentration of ˜6×10 19  cm −3  to ˜3.75×10 20  cm −3 .  
     
     
         7 . A method of trimming a poly silicon resistor to a target resistance formed using a low concentration doping comprising the steps of: 
 passing an electrical signal through said resistor,    measuring and increasing said passed electrical signal until the resistance of said resistor equals the target resistance.    
     
     
         8 . A method of trimming a polysilicon resistor to a target resistance formed using a low concentration doping, as in  claim 7  wherein the step of passing am electrical signal is by way of a current pulse through said resistor and said method further comprises: 
 measuring and increasing said passed current pulse until the resistance of said resistor equals the target resistance.  
 
     
     
         9 . A method of trimming a polysilicon resistor to a target resistance formed using a low concentration doping as in  claim 7  wherein the step of passing a current pulse through said resistor is less than 20 mA.  
     
     
         10 . A method of trimming a polysilicon resistor to a target resistance formed using a low concentration doping as in  claim 7  wherein the step of passing a current pulse through said resistor is done a voltage less than 16V.  
     
     
         11 . A resistor having a resistance that can be adjusted by current being passed there through and which is formed as part of a semiconductor device comprising: 
 a polycrystalline silicon resistor formed of on a layer, wherein said polysilicon resistor is formed using a doping wherein said doping has a concentration of greater than ˜6×10 19  cm −3 .    
     
     
         12 . A resistor having a resistance that can be adjusted by current being passed there through and which is formed as part of a semiconductor device comprising: 
 a polycrystalline silicon resistor formed of on a layer, wherein said polysilicon resistor is formed using a late implant doping technique.    
     
     
         13 . A method as in  claim 3  wherein said final annealing step occurs at or below 900° C.  
     
     
         14 . A method of trimming a polysilicon resistor to a target resistance formed using a low concentration doping as in  claim 7  wherein the electrical signal that is passed is less than 16V.  
     
     
         15 . A method as in  claim 3  further comprising the step of forming a field oxide layer prior to the depositing of said polycrystaline layer.