Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring

Abstract

A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. In a fifth aspect, the capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure. In sixth and seventh aspects, wiring is provided. In the sixth aspect, an aluminum wiring layer and a protective (and/or barrier) layer are formed by sputtering in the same vacuum sputtering chamber without breaking the vacuum between forming the layers; in the seventh aspect, a refractory metal, or a refractory metal silicide QSi x , where Q is a refractory metal and 0<x<2, is used as a protective layer, for an aluminum wiring containing an added element (e.g., Cu) to prevent migration.

What is claimed is:  
     
         1 . A method of producing a wiring layer on a substrate, comprising the steps of: 
 forming a first metal wiring layer by a first sputtering on said substrate inside a vacuum chamber, the substrate being subjected to a vacuum during the first sputtering; and    without breaking the vacuum, forming a second wiring layer on said first metal wiring layer by a second sputtering, inside the same vacuum chamber as that used for forming said first metal wiring layer.    
     
     
         2 . A method according to  claim 1 , wherein said first metal wiring layer is an aluminum wiring layer to which at least one element for reducing migration is added.  
     
     
         3 . A method according to  claim 1 , wherein said first metal wiring layer is an aluminum wiring and second wiring layer is a refractory metal wiring or a refractory metal silicide wiring.  
     
     
         4 . A method according to  claim 3 , wherein said second wiring layer is a refractory metal wiring layer, or a refractory metal silicide wiring layer, which can protect said aluminum wiring layer from a liquid used for wet treatment in forming said aluminum wiring layer.  
     
     
         5 . A method according to  claim 1 , wherein a third metal wiring layer substantially continuously in contact with said second wiring layer is formed on the substrate prior to forming said first metal wiring layer, said third metal wiring layer being formed by sputtering inside the same vacuum system as that of said first metal wiring layer and second wiring layer before said first metal wiring layer is formed.  
     
     
         6 . A method according to  claim 1 , wherein said substrate is a semiconductor integrated circuit device.  
     
     
         7 . A method according to  claim 6 , wherein said semiconductor integrated circuit device is a dynamic random access memory, and said first metal wiring layer and second wiring layer in combination provide a data line of said dynamic random access memory.  
     
     
         8 . A method according to  claim 1 , wherein said forming the first metal wiring layer and second wiring layer includes forming first and second metal layers stacked on each other by said sputtering, the first and second metal layers being formed over all the substrate, forming an etch mask on the second metal layer, and etching the first and second metal layers using the etch mask, so as to form the first metal wiring layer and second wiring layer.  
     
     
         9 . A method according to  claim 8 , including the further step of removing the etch mask.  
     
     
         10 . A method according to  claim 9 , wherein the first metal layer is aluminum, wherein the further step of removing the etch mask is a wet treatment, and wherein the second metal layer is made of a material that can protect the aluminum during the wet treatment to remove the etch mask.