Method and apparatus for synthesizing dual band high-frequency signals for wireless communications
Abstract
A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, on-package oscillator circuit inductors are provided for band selection purposes, with no external package connection to connect off-package or external inductors to on-package inductance circuits. Multiple package electrical connection points may also be provided on-package to allow for selection of alternate oscillator inductance values during package assembly.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . A semiconductor package comprising:
a package substrate having a first surface; an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry; and at least one inductance circuit formed entirely within said semiconductor package and formed at least partially between said integrated circuit and said package substrate, the inductance circuit at least in part determining an output frequency for the frequency synthesizer circuitry.
2 . The semiconductor package of claim 1 , wherein said frequency synthesizer circuitry comprises a phase locked loop circuit.
3 . The semiconductor package of claim 1 , wherein said frequency synthesizer circuitry has an output frequency operable within a plurality of bands, and wherein said at least one inductance circuit forms part of a controlled oscillator circuit within said frequency synthesizer circuitry that is selectably operable within said plurality of frequency bands, the output frequency being dependent upon the controlled oscillator circuit.
4 . The semiconductor package of claim 3 , wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.
5 . The semiconductor package of claim 1 , further comprising at least one substrate electrical contact disposed on said first surface of said package substrate; and wherein said inductance circuit is formed by first and second conductive features electrically coupled between said integrated circuit and said at least one substrate electrical contact to form an electrically conductive path.
6 . The semiconductor package of claim 5 , wherein no external package electrical connection exists to said substrate electrical contact.
7 . The semiconductor package of claim 5 , wherein said package substrate is provided with at least two alternative substrate electrical contacts corresponding to said inductance circuit to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of said inductance circuit, an inductance value of said inductance circuit being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.
8 . The semiconductor package of claim 7 , wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative substrate bonding pads spaced at variable distances from said integrated circuit; and wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds electrically connected to a selected one of said alternative substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.
9 . The semiconductor package of claim 7 , wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of said inductance circuit comprise first and second solder bumps positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.
10 . The semiconductor package of claim 7 , wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.
11 . The semiconductor package of claim 3 , further comprising a plurality of substrate electrical contacts disposed on said first surface of said package substrate; and
wherein the controlled oscillator circuit has a plurality of selectable inductance circuits having different inductance values, the selectable inductance circuits allowing for the oscillator circuit to be operable in the plurality of frequency bands; and wherein each of said plurality of selectable inductance circuits is formed by first and second conductive features electrically coupled between said integrated circuit and one or more of said substrate electrical contacts to form an electrically conductive path.
12 . The semiconductor package of claim 11 , wherein said package is provided with alternative substrate electrical contacts corresponding to each of said inductance circuits to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of each said inductance circuits, the inductance value of each of said inductance circuits being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.
13 . The semiconductor package of claim 12 , wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative substrate bonding pads spaced at variable distances from said integrated circuit; and wherein said first and second conductive features of each inductance circuit comprise first and second wire bonds electrically connected to a selected one of said alternative substrate bonding pads to form an electrically conductive path having a first inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.
14 . The semiconductor package of claim 12 , wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of each inductance circuit comprise first and second solder bumps positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.
15 . The semiconductor package of claim 12 , wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of each inductance circuit comprise first and second wire bonds positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.
16 . The semiconductor package of claim 12 , wherein said controlled oscillator circuit comprises first and second selectable inductance circuits and a switch coupled to selectively choose either said first or said second selectable inductance circuit for inclusion within said controlled oscillator circuit.
17 . The semiconductor package of claim 12 , wherein said controlled oscillator circuit comprises first and second selectable inductance circuits and a switch coupled to selectively choose either one or both of said first or second selectable inductance circuits for inclusion within said controlled oscillator circuit.
18 . The semiconductor package of claim 17 , wherein said switch is coupled so that both of said first and second selectable inductance circuits may be chosen for inclusion within said controlled oscillator circuit in series relationship.
19 . The semiconductor package of claim 17 , wherein said switch is coupled so that both of said first and second selectable inductance circuits may be chosen for inclusion within said controlled oscillator circuit in parallel relationship.
20 . A frequency synthesizer for generating output signals in at least one band of frequency, comprising:
a package substrate having a plurality of substrate electrical contacts disposed on a first surface thereof; an integrated circuit structurally connected to said first surface of said package substrate and having a plurality of integrated circuit electrical contacts disposed on a surface thereof, said integrated circuit and said package substrate together forming said frequency synthesizer and comprising:
a frequency circuit having an output frequency operable within at least one frequency band; and
a controlled oscillator circuit within the phase locked loop circuit, the controlled oscillator circuit being operable within said at least one frequency band and the output frequency being dependent upon the controlled oscillator circuit;
wherein the controlled oscillator circuit has at least one inductance circuit formed at least partially between said integrated circuit and said package substrate, said inductance circuit being electrically connected to an on-package inductor having an inductance value, the at least one inductance circuit allowing the controlled oscillator circuit to be operable in said at least one frequency band.
21 . The frequency synthesizer of claim 20 , wherein said at least one inductance circuit is formed by first and second conductive features electrically coupled between two or more of said integrated circuit electrical contacts and one or more of said substrate electrical contacts to form an electrically conductive path; and wherein said package is provided with at least one of alternative substrate electrical contacts or alternative integrated circuit electrical contacts corresponding to said inductance circuit to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of said inductance circuit, the on-package inductance value of said inductance circuit being dependent on at least one or both of the identity of the alternative substrate electrical contacts, or the identity of the alternative integrated circuit electrical contacts, selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.
22 . The frequency synthesizer of claim 21 , wherein no external package connection exists to said alternative substrate contact selected for connection with said first and second conductive features.
23 . The frequency synthesizer of claim 21 , wherein said frequency circuit comprises a phase locked loop circuit.
24 . The frequency synthesizer of claim 23 , wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.
25 . A method of assembling a semiconductor package, comprising:
providing a package substrate having a plurality of substrate electrical contacts disposed on a first surface thereof; providing an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry, the package substrate being provided with at least one substrate electrical contact to provide an electrical connection point during package assembly for at least one or both of a first conductive feature and a second conductive feature of a frequency synthesizer inductance circuit formed entirely within said semiconductor package; and electrically connecting at least one or both of said first and second conductive features to said at least one electrical contact to form said frequency synthesizer inductance circuit, the inductance circuit at least in part determining an output frequency for the frequency synthesizer package.
26 . The method of claim 25 , wherein the package substrate is provided with at least two alternative substrate electrical contacts to provide alternate electrical connection points during package assembly for at least one or both of said first conductive feature and said second conductive feature of a frequency synthesizer inductance circuit formed entirely within said semiconductor package, the inductance value of said frequency synthesizer inductance circuit being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features; and further comprising: selecting at least one of said alternative substrate electrical contacts; and
electrically connecting at least one or both of said first and second conductive features to said selected alternative substrate electrical contact to form said frequency synthesizer inductance circuit.
27 . The method of claim 26 , wherein said frequency synthesizer circuitry comprises a phase locked loop circuit.
28 . The method of claim 26 , wherein said frequency synthesizer circuitry has an output frequency operable within a plurality of bands, and wherein said frequency synthesizer inductance circuit forms part of a controlled oscillator circuit within said frequency synthesizer circuitry that is selectably operable within said plurality of frequency bands, the output frequency being dependent upon the controlled oscillator circuit.
29 . The semiconductor package of claim 28 , wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.
30 . The method of claim 26 , wherein no external package connection exists to said alternative substrate contact selected for electrical connection with at least one or both of said first and second conductive features.
31 . The method of claim 26 , wherein said at least two alternative substrate electrical contacts comprise at least two alternative substrate bonding pads spaced at variable distances from said integrated circuit; wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds; and wherein said step of electrically connecting comprises electrically connecting both of said first and second wire bonds to a selected one of said alternative substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.
32 . The semiconductor package of claim 26 , wherein said at least two alternative substrate electrical contacts comprise at least two alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of said inductance circuit comprise first and second solder bumps; and wherein said step of electrically connecting comprises positioning said first and second conductive features of said inductance circuit so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.
33 . The semiconductor package of claim 26 , wherein said at least two alternative substrate electrical contacts corresponding to said inductance circuit comprise at least two alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature; wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds; and wherein said step of electrically connecting comprises electrically connecting said first and second wire bonds to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.Join the waitlist — get patent alerts
Track US2002041216A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.