US2002047153A1PendingUtilityA1

Semiconductor integrated circuit device and method of manufacturing the same

Priority: Dec 18, 1997Filed: Oct 30, 2001Published: Apr 25, 2002
Est. expiryDec 18, 2017(expired)· nominal 20-yr term from priority
H10P 14/414H10D 64/0112H10W 20/069H10W 20/066H10W 20/047H10W 20/033Y10S257/908H10D 1/716H10D 1/042H10B 12/482H10B 12/09H10D 64/01125
40
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Claims

Abstract

A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.

Claims

exact text as granted — not AI-modified
1 . A semiconductor integrated circuit device having a MISFET for selecting memory cells formed at a principal surface of a semiconductor substrate comprising: 
 a first conductor formed over the source/drain regions of said MISFET;    a second conductor formed over said first conductor; and    a bit line formed over said second conductor;    wherein said source/drain regions of said MISFET;    said first conductor, said second conductor, and said bit line are electrically connected.    
     
     
         2 . A semiconductor integrated circuit device according to  claim 1 , wherein said first conductor is comprised of polycrystal silicon film.  
     
     
         3 . A semiconductor integrated circuit device according to  claim 1 , wherein said second conductor and said bit line are comprised of a metal film.  
     
     
         4 . A semiconductor integrated circuit device according to  claim 1 , further comprising: 
 a titanium silicide film formed over said first conductor; and    a titanium nitride film formed over said titanium silicide film,    wherein said second conductor is formed over said titanium nitride film.    
     
     
         5 . A method of manufacturing a semiconductor integrated circuit device comprising the steps of: 
 (a) forming a MISFET for selecting memory cells at a principal surface of a semiconductor substrate;    (b) forming a first conductor over the source/drain regions of said MISFET;    (c) forming a second conductor over said first conductor; and    (d) forming a bit line over said second conductor.    
     
     
         6 . A method of manufacturing a semiconductor integrated circuit device according to  claim 5 , wherein 
 said first conductor is comprised of polycrystal silicon film.    
     
     
         7 . A method of manufacturing a semiconductor integrated circuit device according to  claim 5 , wherein 
 said second conductor and said bit line are comprised of a metal film.    
     
     
         8 . A method of manufacturing a semiconductor integrated circuit device according to  claim 5 , further comprising, between said steps (b) and (c), the steps of: 
 (e) forming a titanium silicide film over said first conductor; and    (f) forming a titanium nitride film over said titanium silicide film.

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