BGA package and method of manufacturing the same

Abstract

A BGA package includes a semiconductor chip, and a PCB having a board body, a plurality of circuit patterns, a plurality of signal via holes, a solder resist, and a plurality of thermal emissive vias. The thermal emissive vias are holes located beneath a chip attach area, and these holes are filled with metal having a low melting point. The metal prevents moisture from being absorbed, while effectively transferring heat. The semiconductor chip is attached to the chip attach area of the PCB and is connected to circuit patterns of the PCB with bonding wires. The bonding wires and the semiconductor chip are encapsulated to protect them from external environmental stress. Solder bumps are formed on circuit patterns of the PCB. The BGA package has advantages in that it prevents moisture from penetrating to the chip through the thermal emissive vias, and effectively transfers the heat generated by the chip to the outside.

What is claimed is:  
     
         1 . A printed circuit board for use in a semiconductor device package, said printed circuit board comprising: 
 a board body having an upper surface, and a lower surface;    a chip attach area, where a semiconductor chip is to be attached, at the upper surface of said board body;    a plurality of circuit patterns on the upper and lower surfaces of said board body, the circuit patterns on said upper surface being disposed around said chip attach area, and the circuit patterns on said lower surface terminating at solder ball pads;    a plurality of signal vias extending through said board body and connecting the circuit patterns on the upper surface of said board body to the circuit patterns on said lower surface of the board body;    solder resist coating the upper and lower surfaces of said board body except on said upper surface at locations corresponding to respective ends of the circuit patterns which lie adjacent to said chip attach area and except on said lower surface at locations corresponding to the solder ball pads; and    a plurality of thermal emissive vias comprising thermal emissive via holes extending through said board body and opening at said chip attach area, and metal completely filling said thermal emissive via holes.    
     
     
         2 . A printed circuit board as claimed in  claim 1 , wherein said metal has a low melting point.  
     
     
         3 . A printed circuit board as claimed in  claim 2 , wherein said metal is tin (Sn).  
     
     
         4 . A method of manufacturing a printed circuit board, said method comprising: 
 (a) providing an intermediate product of the printed circuit board comprising a board body having an upper surface, and a lower surface, 
 a chip attach area, where a semiconductor chip is to be attached, at the upper surface of said board body,  
 a plurality of circuit patterns on the upper and lower surfaces of said board body, the circuit patterns on said upper surface being disposed around said chip attach area, and the circuit patterns on said lower surface terminating at solder ball pads,  
 a plurality of signal vias extending through said board body and connecting the circuit patterns on the upper surface of said board body to the circuit patterns on said lower surface of the board body, and  
 a plurality of thermal emissive via holes extending through said board body and opening at said chip attach area;  
   (b) coating the lower surface of said board body with solder resist except at locations corresponding to the solder ball pads;    (C) filling said thermal emissive via holes completely with a metal from the upper surface of the board body; and    (d) after the thermal emissive holes are filled, coating the upper surface of said board body with solder resist except at locations corresponding to respective ends of the circuit patterns which lie adjacent to said chip attach area and thereby covering the thermal emissive via holes filled with the metal with solder resist.    
     
     
         5 . A method of manufacturing a printed circuit board as claimed in  claim 4 , wherein said filling the thermal emissive via holes with metal comprises: 
 placing a mask having holes, arrayed in a pattern matching that of said thermal emissive holes, on the upper surface of said board body with the holes in the mask aligned with the thermal emissive via holes,    providing metal paste on the mask,    subsequently forcing the metal paste through the holes in the mask and into the thermal emissive holes, and    subjecting the metal paste in the thermal emissive holes to a reflow soldering process.    
     
     
         6 . A method of manufacturing a printed circuit board as claimed in  claim 4 , wherein said filling the thermal emissive via holes with metal comprises: 
 placing a mask having holes, arrayed in a pattern matching that of said thermal emissive holes, on the upper surface of said board body with the holes in the mask aligned with the thermal emissive via holes,    providing balls of said metal in the holes in the mask to align the metal balls with the thermal emissive via holes, and    subsequently subjecting the metal balls to a reflow soldering process.    
     
     
         7 . A method of manufacturing a printed circuit board as claimed in  claim 4 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.  
     
     
         8 . A method of manufacturing a printed circuit board as claimed in  claim 5 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.  
     
     
         9 . A method of manufacturing a printed circuit board as claimed in  claim 6 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.  
     
     
         10 . A ball grid array package comprising: 
 a board body having an upper surface, and a lower surface;    a chip attach area at the upper surface of said board body;    a semiconductor chip attached to said board body at said chip attach area, said semiconductor chip having a plurality of chip pads;    a plurality of circuit patterns on the upper and lower surfaces of said board body, the circuit patterns on said upper surface being disposed around said chip attach area, and the circuit patterns on said lower surface terminating at solder ball pads;    a plurality of signal vias extending through said board body and connecting the circuit patterns on the upper surface of said board body to the circuit patterns on said lower surface of the board body;    a plurality of thermal emissive vias comprising thermal emissive via holes extending through said board body and opening at said chip attach area, and metal completely filling said thermal emissive via holes;    solder resist covering said thermal emissive via holes filled with the metal and coating the upper surface of said board body except at locations corresponding to respective ends of the circuit patterns which lie adjacent to said chip attach area;    solder resist coating the lower surface of said board body except at locations corresponding to the solder ball pads;    electrical connectors electrically connecting the chip pads of said semiconductor chip to the circuit patterns on the upper surface of said board body;    a compound encapsulating said semiconductor chip and said electrical connectors; and    a plurality of solder balls attached to said solder ball pads.    
     
     
         11 . A ball grid array package as claimed in  10 , wherein said metal has a low melting point.  
     
     
         12 . A ball grid array package as claimed in  11 , wherein said metal is Sn.  
     
     
         13 . A method of manufacturing a ball grid array package, said method comprising: 
 (a) providing an intermediate product of a printed circuit board comprising a board body having an upper surface, and a lower surface, 
 a chip attach area at the upper surface of said board body,  
 a plurality of circuit patterns on the upper and lower surfaces of said board body, the circuit patterns on said upper surface being disposed around said chip attach area, and the circuit patterns on said lower surface terminating at solder ball pads,  
 a plurality of signal vias extending through said board body and connecting the circuit patterns on the upper surface of said board body to the circuit patterns on said lower surface of the board body, and  
 a plurality of thermal emissive via holes extending through said board body and opening at said chip attach area;  
   (b) coating the lower surface of said board body with solder resist except at locations corresponding to the solder ball pads;    (c) filling said thermal emissive via holes completely with metal from the upper surface of the board body;    (d) after the thermal emissive holes are filled, coating the upper surface of said board body with solder resist except at locations corresponding to respective ends of the circuit patterns which lie adjacent to said chip attach area and thereby covering the thermal emissive via holes filled with the metal with solder resist;    (e) attaching a semiconductor chip having a plurality of chip pads to said chip attach area;    (f) connecting the chip pads of the semiconductor chip to the circuit patterns on the upper surface of said board body with electrical connectors;    (g) encapsulating the semiconductor chip and the electrical connectors; and    (h) attaching solder balls to said solder ball pads.    
     
     
         14 . A method of manufacturing a ball grid array package as claimed in  claim 13 , wherein said filling the thermal emissive via holes with metal comprises: 
 placing a mask having holes, arrayed in a pattern matching that of said thermal emissive holes, on the upper surface of said board body with the holes in the mask aligned with the thermal emissive via holes,    providing metal paste on the mask,    subsequently forcing the metal paste through the holes in the mask and into the thermal emissive holes, and    subjecting the metal paste in the thermal emissive holes to a reflow soldering process.    
     
     
         15 . A method of manufacturing a ball grid array package as claimed in  claim 13 , wherein said filling the thermal emissive via holes with metal comprises: 
 placing a mask having holes, arrayed in a pattern matching that of said thermal emissive holes, on the upper surface of said board body with the holes in the mask aligned with the thermal emissive via hole,    providing balls of said metal in the holes in the mask to align the metal balls with the thermal emissive via holes, and    subsequently subjecting the metal balls to a reflow soldering process.    
     
     
         16 . A method of manufacturing a ball grid array package as claimed in  claim 13 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.  
     
     
         17 . A method of manufacturing a ball grid array package as claimed in  claim 14 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.  
     
     
         18 . A method of manufacturing a ball grid array package as claimed in  claim 15 , wherein said filling the thermal emissive via holes with metal comprises filling the thermal emissive via holes with a metal having a low melting point.