Method for finishing polysilicon or amorphous substrate structures

Abstract

According to the invention, a method for preparing multicrystalline substrates as “handle wafers” for subsequent bonding to “device layer” quality materials is disclosed. In one step, starting with a suitable substrate such as multicrystalline silicon, the substrate surface is prepared for layer transfers by using a novel CMP method in which, after a suitable period of polishing at elevated pH, a surfactant and rinse material is gradually introduced into the slurry to lower pH and remove wear materials from the slurry. In another step, a filler layer of polycrystalline silicon is transferred to the face of the polished substrate to a predetermined thickness, thus filling in surface defects remaining after the initial CMP step, and a subsequent CMP polishing step is performed. By these steps, multicrystalline substrates can be prepared with surface roughness of twenty Angstroms or less, which is suitable for defect-free bonding to device-layer materials in this embodiment.

What is claimed is:  
     
         1 . A method for preparing multicrystalline substrates as handling wafers for subsequent bonding to device layer materials, the method comprising the steps of: 
 providing an initial multicrystalline substrate;    polishing the multicrystalline substrate to reduce surface roughness to about 5 nm;    forming a filler layer overlying the face of the substrate to a predetermined thickness, the filler layer comprising a surface that is substantially free from indications of the multicrystalline arrangement; and    further polishing the surface of the filler layer to form a substantially smooth upper surface on the substrate,    wherein the substantially smooth upper surface is characterized by a surface roughness of twenty Angstroms or less.    
     
     
         2 . The method of  claim 1 , wherein the initial substrate is selected from a polycrystalline silicon wafer, a glass substrate, a ceramic substrate, an organic film, a metal substrate, and an amorphous wafer.  
     
     
         3 . The method of  claim 1 , wherein the initial substrate has a typical crystalline dimension of about 0.5 to 10 millimeters in size.  
     
     
         4 . The method of  claim 1 , wherein the filler layer is selected from a CVD oxide, and a polycrystalline silicon.  
     
     
         5 . The method of  claim 1 , wherein the filler layer is removed to a thickness of one half or more of the predetermined thickness.  
     
     
         6 . The method of  claim 1 , wherein the filler layer is a polycrystalline silicon, the polycrystalline being formed using a low pressure chemical deposition technique.  
     
     
         7 . The method of  claim 1 , wherein the filler layer is chosen from the group consisting of an insulating layer andor a composite layer.  
     
     
         8 . The method of  claim 1 , wherein the surface roughness is five Angstroms or less.  
     
     
         9 . The method of  claim 1 , wherein the filler layer is made by a chemical deposition process or a sputtering process.  
     
     
         10 . The method of  claim 1 , wherein the substrate is a ground substrate or unpolished substrate.  
     
     
         11 . The method of  claim 1 , wherein the polishing process is a chemical mechanical polishing technique comprising: 
 applying a mechanical fine-grinding step;    applying a rough polishing step using a weakly alkaline slurry;    changing the composition of the slurry by feeding a neutral polishing slurry to the polishing pad and gradually reducing supply of rough polishing slurry; and    wherein surface roughness after polishing is 0.5 nm or less.    
     
     
         12 . The method of  claim 1 , wherein the polishing process is a chemical mechanical polishing comprising: 
 applying a mechanical fine-grinding step;    applying a rough polishing step using a weakly alkaline slurry;    adding TMAH to the slurry to adjust the alkalinity of the slurry for increased removal rates while maintaining material removal rates relatively constant between various grain regions of the substrate; and    effecting a controlled transition to a second slurry composition to obtain microscopically smooth surfaces;    wherein surface roughness after polishing is 0.5 nm or less.    
     
     
         13 . The method of  claim 1 , wherein the polishing process is a double-sided chemical mechanical polishing technique comprising: 
 applying a mechanical fine-grinding step;    applying a rough polishing step using a weakly alkaline slurry;    changing the composition of the slurry by feeding a neutral polishing slurry to the polishing pad and gradually reducing supply of rough polishing slurry; and    wherein surface roughness after polishing is twenty Angstroms or less.    
     
     
         14 . The method of  claim 1 , wherein the polishing process is a double-sided chemical mechanical polishing technique in which polishing is done on a double-sided polishing machine to polish front and back sides of the substrate simultaneously, comprising: 
 applying a mechanical fine-grinding step;    applying a rough polishing step using a weakly alkaline slurry;    adding TMAH to the slurry to adjust the alkalinity of the slurry for increased removal rates while maintaining material removal rates relatively constant between various grain regions of the substrate;    effecting a controlled transition to a second slurry composition to obtain microscopically smooth surfaces;    wherein the front and back side each achieve a flatness of 0.5 micron or less; and    the front side achieves a roughness of 0.5 nm or less.    
     
     
         15 . Electronic devices made from bonded assemblies prepared using the method of  claim 1 .  
     
     
         16 . Micro-Electro-Mechanical Structures (MEMS) made from bonded assemblies prepared using the method of  claim 1 .  
     
     
         17 . Micro-Opto-Electro-Mechanical Structures (MOEMS) made from bonded assemblies prepared using the method of  claim 1 .  
     
     
         18 . A method for polishing substrates, the method comprising steps of: 
 applying a rough polishing step using a weakly alkaline slurry;    changing the composition of the slurry by feeding a neutral polishing slurry to the polishing pad and gradually reducing supply of rough polishing slurry; and    wherein surface roughness after polishing is 0.5 nm or less.    
     
     
         19 . The method of  claim 18 , wherein the polishing is performed on a double-sided polishing machine to polish front and back sides of said substrate simultaneously.  
     
     
         20 . Electronic devices made from bonded assemblies prepared using the method of  claim 18 .  
     
     
         21 . Micro-Electro-Mechanical Structures (MEMS) made from bonded assemblies prepared using the method of  claim 18 .  
     
     
         22 . Micro-Opto-Electro-Mechanical Structures (MOEMS) made from bonded assemblies prepared using the method of  claim 18 .  
     
     
         23 . A method for detection of hidden bonding flaws in multiple bonded wafers, the method comprising steps of: 
 transmitting infrared radiation through a first side of a multiple bonded wafer sample;    receiving the scattered infrared radiation exiting from a second side of said sample, said second said being opposite from said first side; and    converting said received radiation into an electronic signal in which defects appear as local maxima of said signal.