Semiconductor integrated circuit device and the process of manufacturing the same

Abstract

Bit lines BL of a DRAM that are narrowed to 0.1 μm or less are made of two-layered conductive films, in which a W (tungsten) film is deposited on a WN (tungsten nitride) film. For bit lines BL, fewer W atoms diffuse across the interface between the W film and the WN film, within crystal grains, and at grain boundaries of the W film, and no tensile stress exists in the W film. Therefore, high-temperature thermal processing in the capacitor formation process does not cause wiring breaks even when the width of the bit lines BL is narrowed to 0.1 μm or less.

What is claimed is:  
     
         1 . A semiconductor integrated circuit device comprising: 
 memory cells including; 
 a memory-cell-selecting MISFET, which is formed over the major surface of a semiconductor substrate, with a gate electrode that is configured in a single unit with a word line; and  
 a data-storage capacitor that is formed over a second insulating film which covers the bit line and that is electrically connected to the other part, either source or drain, of the memory-cell-selecting MISFET; and  
   a bit line that is formed over a first insulating film which covers the memory-cell-selecting MISFET and that is electrically connected to either the source or drain of the memory-cell-selecting MISFET;    wherein compressive stress is applied to the conductive film that configures the bit line.    
     
     
         2 . A semiconductor integrated circuit device, as defined in  claim 1 , wherein the width of the bit line is less than the space between adjacent word lines.  
     
     
         3 . A semiconductor integrated circuit device, as defined in  claim 2 , wherein the bit line is made of a tungsten nitride film and a tungsten film that is deposited on the tungsten nitride film.  
     
     
         4 . A semiconductor integrated circuit device, as defined in  claim 1 , wherein the width of the bit line is 0.1 μm or less.  
     
     
         5 . A semiconductor integrated circuit device, as defined in  claim 4 , wherein the bit line is made of a tungsten nitride film and a tungsten film that is deposited on the tungsten nitride film.  
     
     
         6 . A semiconductor integrated circuit device comprising: 
 memory cells including; 
 a memory-cell-selecting MISFET, which is formed in a first region of the major surface of a semiconductor substrate, with a gate electrode that is configured in a single unit with a word line; and  
 a data-storage capacitor that is formed over a second insulating film which covers the bit line and that is electrically connected to the other part, either source or drain, of the memory-cell-selecting MISFET; and  
   a bit line that is formed over a first insulating film which covers the memory-cell-selecting MISFET and that is electrically connected to either the source or drain of the memory-cell-selecting MISFET;    wherein the bit line is made of a first conductive film and a second conductive film that is deposited on the first conductive film, and the width of the bit line is less than the space between adjacent word lines.    
     
     
         7 . A semiconductor integrated circuit device, as defined in  claim 6 , wherein the second conductive film is a tungsten film.  
     
     
         8 . A semiconductor integrated circuit device, as defined in  claim 7 , wherein the first conductive film is a tungsten nitride film.  
     
     
         9 . A semiconductor integrated circuit device, as defined in  claim 7 , wherein the first conductive film is a titanium nitride film.  
     
     
         10 . A semiconductor integrated circuit device, as defined in  claim 6 , wherein the width of the bit line is 0.1 μm or less.  
     
     
         11 . A semiconductor integrated circuit device, as defined in  claim 10 , wherein the second conductive film is a tungsten film.  
     
     
         12 . A semiconductor integrated circuit device, as defined in  claim 11 , wherein the first conductive film is a tungsten nitride film.  
     
     
         13 . A semiconductor integrated circuit device, as defined in  claim 11 , wherein the first conductive film is a titanium nitride film.  
     
     
         14 . A semiconductor integrated circuit device, as defined in  claim 6 , wherein the width of the bit line is less than the space between adjacent word lines.  
     
     
         15 . A semiconductor integrated circuit device, as defined in  claim 6 , wherein wiring is formed in a second region of the major surface of a semiconductor substrate in the bit-line forming process, and the width of the bit line is less than that of the wiring.  
     
     
         16 . A semiconductor integrated circuit device comprising: 
 memory cells including; 
 a memory-cell-selecting MISFET, which is formed over the major surface of a semiconductor substrate, with a gate electrode that is configured in a single unit with a word line; and  
 a data-storage capacitor that is formed over a second insulating film which covers the bit line and that is electrically connected to the other part, either source or drain, of the memory-cell-selecting MISFET; and  
   a bit line that is formed over a first insulating film which covers the memory-cell-selecting MISFET and that is electrically connected to either the source or drain of the memory cell-selecting MISFET;    wherein the bit line is made of a first conductive film and a second conductive film that is deposited on the first conductive film, and the width of the bit line is 0.1 μm or less.    
     
     
         17 . A semiconductor integrated circuit device, as defined in  claim 16 , wherein the second conductive film is a tungsten film.  
     
     
         18 . A semiconductor integrated circuit device, as defined in  claim 17 , wherein the first conductive film is a tungsten nitride film.  
     
     
         19 . A semiconductor integrated circuit device, as defined in  claim 17 , wherein the first conductive film is a titanium nitride film.  
     
     
         20 . A semiconductor integrated circuit device comprising: 
 memory cells, which are located at the intersections of word lines that extend in a first direction of the major surface of a semiconductor substrate and bit lines that extend in a second direction that intersects the first direction at a right angle, and which include; 
 a memory-cell-selecting MISFET with a gate electrode that is configured in a single unit with the word line; and  
 a data-storage capacitor connected to the MISFET in series;  
   characterized in that the bit lines are formed over the memory-cell-selecting MISFET via a first insulating film and the data-storage capacitor is formed over the bit lines via a second insulating film;    wherein the bit lines are made of a first conductive film made of a tungsten compound and a second conductive film made of tungsten that is deposited on the first conductive film.    
     
     
         21 . A semiconductor integrated circuit device, as defined in  claim 20 , wherein the first conductive film is a tungsten nitride film.  
     
     
         22 . A semiconductor integrated circuit device, as defined in  claim 20 , wherein the width of the bit line is smaller than that of the word line.  
     
     
         23 . A semiconductor integrated circuit device, as defined in  claim 20 , wherein the width of the bit line is equal to or smaller than the minimum size for processing as determined by the limitations on photolithographic resolution.  
     
     
         24 . A semiconductor integrated circuit device comprising: 
 memory cells, which are located at the intersections of word lines that extend in a first direction of the major surface of a semiconductor substrate and bit lines that extend in a second direction that intersects the first direction at a right angle, and which include; 
 a memory-cell-selecting MISFET with a gate electrode that is configured in a single unit with the word line; and  
 a data-storage capacitor connected to the MISFET in series;  
   characterized in that the bit lines are formed over the memory-cell-selecting MISFET via a first insulating film and the data-storage capacitor is formed over the bit lines via a second insulating film;    wherein the bit lines are made of a first conductive film made of molybdenum or a molybdenum compound and a second conductive film made of tungsten that is deposited on the first conductive film.    
     
     
         25 . A semiconductor integrated circuit device, as defined in  claim 24 , wherein the first conductive film is a molybdenum film, a molybdenum nitride film, a molybdenum boron film, or a molybdenum carbide film.  
     
     
         26 . A fabrication method for a semiconductor integrated circuit device comprising the steps of: 
 (a) forming a memory-cell-selecting MISFET with a gate electrode that is configured in a single unit with a word line over the major surface of a semiconductor substrate;    (b) forming a first insulating film over the memory-cell-selecting MISFET, 
 forming a first conductive film over the first insulating film,  
 forming a second conductive film on the first conductive film;  
   (c) forming an etching-resistant film over the second conductive film, and 
 forming bit lines made of the first and second conductive films by using the etching-resistant film as a mask in etching the first and second conductive films;  
   wherein isotropic etching takes place when the first and second conductive films are etched with the etching-resistant film as a mask.    
     
     
         27 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 26 , wherein the second conductive film is a tungsten film.  
     
     
         28 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 27 , wherein the first conductive film is a tungsten nitride film.  
     
     
         29 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 27 , wherein the first conductive film is a titanium nitride film.  
     
     
         30 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 26 , further comprising the steps, after step (c), of the forming of a second insulating film over the bit line and of a capacitor configured by a lower electrode, a capacitance-insulating film, and an upper electrode over the second insulating film, wherein the step of forming the capacitor includes high-temperature thermal processing.  
     
     
         31 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 30 , wherein the high-temperature thermal processing is at 750° C. or more.  
     
     
         32 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 30 , wherein the high-temperature thermal processing is used to crystallize a tantalum oxide film that configures the capacitance-insulating film.  
     
     
         33 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 30 , wherein the high-temperature thermal processing is used to crystallize the ferroelectric film that configures the capacitance-insulating film in an atmosphere that includes oxygen gas.  
     
     
         34 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 26 , wherein the width of the bit line is equal to or less than the average crystal grain size of the conductive material that configures the second conductive film.  
     
     
         35 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 34 , wherein the width of the bit line is equal to or less than 0.1 μm.  
     
     
         36 . A fabrication method for a semiconductor integrated circuit device comprising the steps of: 
 (a) forming a memory-cell-selecting MISFET with a gate electrode that is configured in a single unit with a word line over the major surface of a semiconductor substrate;    (b) forming a first insulating film over the memory-cell-selecting MISFET, 
 forming a first conductive film over the first insulating film,  
 forming a second conductive film on the first conductive film;  
   (c) forming an etching-resistant film over the second conductive film, 
 thinning the etching-resistant film; and  
   (d) forming bit lines made of the first and second conductive films by using a narrow etching-resistant film as a mask in etching the first and second conductive films.    
     
     
         37 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 36 , wherein the etching-resistant film is narrowed by ashing the etching-resistant film.  
     
     
         38 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 37 , wherein isotropic etching takes place when the etching-resistant film is used as a mask in etching the first and second conductive films.  
     
     
         39 . A fabrication method for a semiconductor integrated circuit device, as defined in  claim 36 , further comprising the step of thermal processing at a temperature greater than the temperature used for forming the second conductive film, after step (d).