US2003092254A1PendingUtilityA1

Common ball-limiting metallurgy for I/O sites

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Priority: Feb 9, 2001Filed: Dec 18, 2002Published: May 15, 2003
Est. expiryFeb 9, 2021(expired)· nominal 20-yr term from priority
Inventors:George F. WalkerRonald D. GoldblattPeter A. GruberRaymond R. HortonKevin S. PetrarcaRichard P. VolantTien-Jen Cheng
H10W 72/5522H10W 72/536H10W 72/9415H10W 72/934H10W 72/29H10W 72/952H10W 72/59H10W 72/923H10W 72/90H10W 72/07533H10W 72/07532H10W 72/20H10W 72/07251H10W 72/251H10W 72/252H10W 72/242H10W 72/012H10W 72/019H10W 20/057H10W 20/054H10W 20/043H10W 72/071
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Claims

Abstract

A process is described for forming a common input-output (I/O) site that is suitable for both wire-bond and solder bump flip chip connections, such as controlled-collapse chip connections (C4). The present invention is particularly suited to semiconductor chips that use copper as the interconnection material, in which the soft dielectrics used in manufacturing such chips are susceptible to damage due to bonding forces. The present invention reduces the risk of damage by providing site having a noble metal on the top surface of the pad, while providing a diffusion barrier to maintain the high conductivity of the metal interconnects. Process steps for forming an I/O site within a substrate are reduced by providing a method for selectively depositing metal layers in a feature formed in the substrate. Since the I/O sites of the present invention may be used for either wire-bond or solder bump connections, this provides increased flexibility for chip interconnection options, while also reducing process costs.

Claims

exact text as granted — not AI-modified
We claim:  
     
         1 . An input-output structure in a feature formed in a substrate, the substrate having a top surface, the feature having feature sidewalls and a feature bottom, the feature bottom formed over an electrically conductive material, the structure comprising: 
 a barrier layer covering the feature sidewalls and feature bottom, the barrier layer having a barrier bottom and barrier sidewalls;    a seed layer of metal having a seed bottom and seed sidewalls covering at least said barrier bottom; and    a first metal layer covering at least said seed bottom and having a recess formed therein, so that a top surface of said first metal layer is lower than the top surface of the substrate; and    a second metal layer covering said first metal layer.    
     
     
         2 . The input-output structure of  claim 1  wherein said second metal layer comprises a noble metal.  
     
     
         3 . The input-output structure of  claim 2  wherein the noble metal is selected from the group consisting of gold, platinum, and palladium.  
     
     
         4 . The input-output structure of  claim 1  wherein said second metal layer comprises gold.  
     
     
         5 . The input-output structure of  claim 1  wherein said seed layer comprises copper.  
     
     
         6 . The input-output structure of  claim 1  wherein said first metal layer comprises an electroplatable material.  
     
     
         7 . The input-output structure of  claim 6  wherein the electroplatable material is selected from the group consisting of copper, platinum, nickel, gold, silver, and solder.  
     
     
         8 . The input-output structure of  claim 1  wherein said first metal layer comprises nickel.  
     
     
         9 . The input-output structure of  claim 1  wherein said barrier layer comprises tantalum and tantalum nitride.  
     
     
         10 . The input-output structure of  claim 9  wherein the tantalum nitride is in contact with the substrate.  
     
     
         11 . The input-output structure of  claim 1  further comprising a wire bonded to said second metal layer.  
     
     
         12 . The input-output structure of  claim 11  wherein said wire and said second metal layer comprise gold.  
     
     
         13 . The input-output structure of  claim 1  further comprising a solder ball connected to said second metal layer.  
     
     
         14 . A method of forming a ball-limiting metallurgy structure for an input-output site in a feature formed in a substrate, the substrate having a top surface, the feature having feature sidewalls and a feature bottom, the feature bottom formed over an electrically conductive material, the method comprising the steps of: 
 depositing a barrier layer covering the top surface of the substrate, the feature sidewalls and the feature bottom, so that the barrier layer has a barrier bottom and barrier sidewalls;    depositing a seed layer of metal covering the surface of said barrier layer;    selectively removing said seed layer from at least the top surface so that the seed layer is reduced to a portion of the seed layer on at least said barrier bottom;    electroplating a first metal layer using said portion of said seed layer, so that said first metal layer has a recess formed therein and so that a top surface of said first metal layer is lower than the top surface of the substrate; and    electroplating a second metal layer, so that said second metal layer covers said first metal layer.    
     
     
         15 . The method of  claim 14  wherein the step of depositing a seed layer comprises physical vapor deposition or chemical vapor deposition.  
     
     
         16 . The method of  claim 14  wherein the step of depositing a seed layer comprises chemical vapor deposition.  
     
     
         17 . The method of  claim 14  wherein the step of selectively removing said seed layer comprises chemical-mechanical polishing (CMP).  
     
     
         18 . The method of  claim 14  wherein the steps of electroplating said first metal layer and said second metal layer includes applying a current to said barrier layer.  
     
     
         19 . The method of  claim 14  wherein said second metal layer comprises a noble metal.  
     
     
         20 . The method of  claim 19  wherein the noble metal is selected from the group consisting of gold, platinum, and palladium.  
     
     
         21 . The method of  claim 14  wherein said second metal layer comprises gold.  
     
     
         22 . The method of  claim 14  wherein said seed layer comprises copper.  
     
     
         23 . The method of  claim 14  wherein said first metal layer comprises an electroplatable material.  
     
     
         24 . The method of  claim 23  wherein the electroplatable material is selected from the group consisting of copper, platinum, nickel, gold, silver, and solder.  
     
     
         25 . The method of  claim 14  wherein said first metal layer comprises nickel.  
     
     
         26 . The method of  claim 14  wherein said barrier layer comprises tantalum and tantalum nitride.  
     
     
         27 . The method of  claim 26  wherein the tantalum nitride is in contact with the substrate.  
     
     
         28 . The method of  claim 14  further comprising the step of bonding a wire to said second metal layer.  
     
     
         29 . The method of  claim 28  wherein said wire and said second metal layer comprise gold.  
     
     
         30 . The method of  claim 28  wherein said step of bonding a wire is selected from the group consisting of thermosonic bonding, ultrasonic bonding, and thermocompression bonding.  
     
     
         31 . The method of  claim 14  further comprising the step of forming a solder ball connected to said second metal layer.  
     
     
         32 . The method of  claim 31  wherein the step of forming a solder ball comprises plating.  
     
     
         33 . The method of  claim 31  wherein the step of forming a solder ball comprises evaporation.

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