Monolithic integration of a MOSFET with a MEMS device

Abstract

An integrated microelectromechanical system comprises at least one MOSFET interconnected to at least one MEMS device on a common substrate. A method for integrating the MOSFET with the MEMS device comprises fabricating the MOSFET and MEMS device monolithically on the common substrate. Conveniently, the gate insulator, gate electrode, and electrical contacts for the gate, source, and drain can be formed simultaneously with the MEMS device structure, thereby eliminating many process steps and materials. In particular, the gate electrode and electrical contacts of the MOSFET and the structural layers of the MEMS device can be doped polysilicon. Dopant diffusion from the electrical contacts is used to form the source and drain regions of the MOSFET. The thermal diffusion step for forming the source and drain of the MOSFET can comprise one or more of the thermal anneal steps to relieve stress in the structural layers of the MEMS device.

We claim:  
     
         1 . A method for integrating a metal-oxide semiconductor field effect transistor (MOSFET) with a microelectromechanical systems (MEMS) device on a semiconductor substrate, comprising: 
 forming a gate insulator of the MOSFET on an electronics portion of the substrate;    forming a gate electrode of the MOSFET on the gate insulator;    forming an inter-layer dielectric on the electronics portion of the substrate, thereby encapsulating the gate electrode and the gate insulator;    forming a gate electrical contact through the inter-layer dielectric to the gate electrode;    forming a source electrical contact through the inter-layer dielectric to a source region of the substrate proximate to one side of the gate electrode wherein the source electrical contact further comprises a solid dopant source;    forming a drain electrical contact through the inter-layer dielectric to a drain region of the substrate proximate to the other side of the gate electrode wherein the drain electrical contact further comprises a solid dopant source;    forming a MEMS device structure on a MEMS portion of the substrate comprising at least one dielectric layer on the substrate, at least one structural layer built up from the at least one dielectric layer, and at least one sacrificial layer interleaving the at least one structural layer;    heating the substrate to a sufficiently high temperature to thermally diffuse dopant atoms from the source and drain electrical contacts into the substrate to form the source and drain of the MOSFET;    forming electrical interconnections from the gate electrical contact, the source electrical contact, and the drain electrical contact of the MOSFET to the MEMS device structure; and    removing the at least one sacrificial layer to release the MEMS device.    
     
     
         2 . The method of  claim 1 , wherein the substrate comprises single crystal silicon.  
     
     
         3 . The method of  claim 2 , wherein the single crystal silicon substrate is p-type and the dopant atoms comprise donors.  
     
     
         4 . The method of  claim 2 , wherein the substrate further comprises a p-type well in n-type single crystal silicon and the dopant atoms comprise donors.  
     
     
         5 . The method of  claim 2 , wherein the single crystal silicon substrate is n-type and the dopant atoms comprise acceptors.  
     
     
         6 . The method of  claim 2 , wherein the substrate further comprises an n-type well in n-type single crystal silicon and the dopant atoms comprise acceptors.  
     
     
         7 . The method of  claim 1 , wherein the gate insulator comprises a thermal oxide.  
     
     
         8 . The method of  claim 1 , wherein at least one of the dielectric layers of the MEMS device also forms the gate insulator of the MOSFET.  
     
     
         9 . The method of  claim 1 , wherein the gate electrode comprises doped polysilicon.  
     
     
         10 . The method of  claim 1 , wherein the gate electrode of the MOSFET comprises a first structural layer of the MEMS device.  
     
     
         11 . The method of  claim 1 , wherein the inter-layer dielectric comprises at least one of the sacrificial layers of the MEMS device.  
     
     
         12 . The method of  claim 1 , wherein the electrical contact forming steps comprise forming vias through the inter-layer dielectric and filling the vias with an electrically conductive material.  
     
     
         13 . The method of  claim 1 , wherein the source electrical contact and the drain electrical contact comprise at least one of the structural layers of the MEMS device.  
     
     
         14 . The method of  claim 1 , wherein the at least one structural layer comprises polysilicon.  
     
     
         15 . The method of  claim 1 , wherein the at least one sacrificial layer comprises silicon dioxide.  
     
     
         16 . The method of  claim 1 , wherein the heating step further thermally anneals the MEMS device structure.  
     
     
         17 . The method of  claim 16 , wherein the heating step comprises heating the substrate to a temperature sufficiently high to relieve the stress in the at least one structural layer of the MEMS device structure.  
     
     
         18 . The method of  claim 1 , wherein the electrical interconnections comprise an interconnect metallization.  
     
     
         19 . The method of  claim 18 , wherein the interconnect metallization comprises aluminum.  
     
     
         20 . The method of  claim 1 , wherein the electrical interconnections comprise doped polysilicon.  
     
     
         21 . The method of  claim 1 , wherein the electrical interconnections comprise at least one structural layer of the MEMS device.  
     
     
         22 . An integrated microelectromechanical system, comprising: 
 at least one metal-oxide semiconductor field effect transistor (MOSFET) on an electronics portion of a semiconductor substrate, further comprising: 
 a gate insulator on the substrate,  
 a gate electrode on the gate insulator,  
 a dopant-diffused source in the substrate proximate to one side of the gate electrode,  
 a dopant-diffused drain in the substrate proximate to the other side of the gate electrode,  
 an inter-layer dielectric on the electronics portion of the substrate that encapsulates the gate electrode and the gate insulator,  
 a gate electrical contact through the inter-layer dielectric to the gate electrode,  
 a source electrical contact through the inter-layer dielectric to the source,  
 a drain electrical contact through the inter-layer dielectric to the drain; and  
   at least one microelectromechanical systems (MEMS) device on a MEMS portion of the substrate, further comprising: 
 at least one dielectric layer on the substrate, and  
 at least one structural layer built up from the at least one dielectric layer; and  
   electrical interconnections from the gate electrical contact, source electrical contact, and drain electrical contact of the at least one MOSFET to the at least one MEMS device.    
     
     
         23 . The integrated microelectromechanical system of  claim 22 , wherein the substrate comprises single crystal silicon.  
     
     
         24 . The integrated microelectromechanical system of  claim 23 , wherein the single crystal silicon substrate is p-type and the source and the drain are n-type.  
     
     
         25 . The integrated microelectromechanical system of  claim 23 , wherein the substrate further comprises a p-type well in n-type single crystal silicon and the source and the drain are n-type.  
     
     
         26 . The integrated microelectromechanical system of  claim 23 , wherein the single crystal silicon substrate is n-type and the source and the drain are p-type.  
     
     
         27 . The integrated microelectromechanical system of  claim 23 , wherein the substrate further comprises a p-type well in n-type single crystal silicon and the source and the drain are n-type.  
     
     
         28 . The integrated microelectromechanical system of  claim 22 , wherein the gate insulator comprises a thermal oxide.  
     
     
         29 . The integrated microelectromechanical system of  claim 22 , wherein one of the dielectric layers of the MEMS device also forms the gate insulator of the MOSFET.  
     
     
         30 . The integrated microelectromechanical system of  claim 22 , wherein the at least one structural layer of the MEMS device comprises doped polysilicon.  
     
     
         31 . The integrated microelectromechanical system of  claim 30 , wherein the gate electrode of the MOSFET comprises a first doped polysilicon layer of the MEMS device.  
     
     
         32 . The integrated microelectromechanical system of  claim 22 , wherein the source electrical contact and the drain electrical contact are doped with the same dopant as the source and the drain.  
     
     
         33 . The integrated microelectromechanical system of  claim 30 , wherein the source electrical contact and the drain electrical contact comprise at least one of the doped polysilicon layers of the MEMS device and wherein the at least one of the doped polysilicon layers is doped with the dopant of the dopant-diffused source and drain.  
     
     
         34 . The integrated microelectromechanical system of  claim 22 , wherein the electrical interconnections comprise an interconnect metallization.  
     
     
         35 . The integrated microelectromechanical system of  claim 34 , wherein the interconnect metallization comprises aluminum.  
     
     
         36 . The integrated microelectromechanical system of  claim 30 , wherein the electrical interconnections comprise at least one doped polysilicon layer of the MEMS device.