Structure and method for low-stress concentration solder bumps

Abstract

Low stress concentration solder bumps are created on a semiconductor wafer by the removal of metal oxides on the edges of under bump metallurgy, (UBM). The removal of the oxides from the circular edge of the UBM allow the solder of the solder bump to wet the sides of the UBM, mainly the plated copper portion, thereby resulting in a solder bump structure with a filled undercut. This results in a lower stress concentration solder bump structure. This solder bump structure is obtained after the solder bumps have been reflowed on the wafer.

1 . A solder bump structure comprising: 
 a semiconductor substrate with etched contact holes;    an under bump metallurgy UBM structure, in and above said contact holes; and    a solder bump over said UBM structure wherein the solder totally contacts the edges of the UBM.    
     
     
         2 . The structure of  claim 1  wherein said UBM has edges that are devoid of any metal oxides.  
     
     
         3 . The solder bump structure of  claim 1  wherein the structure has a shape that is devoid of high stress concentration locations.  
     
     
         4 . The structure of  claim 1  wherein a first layer of the UBM is a 0.1-0.2 um layer of titanium (Ti).  
     
     
         5 . The structure of  claim 5  wherein a second layer of the UBM, formed over said first layer, is a 4˜8 um layer of copper (Cu).  
     
     
         6 . The structure of  claim 6  wherein a third layer of the UBM, formed over said second layer, is a 3˜6 um layer of nickel (Ni).  
     
     
         7 . The structure of  claim 1  further comprising a bond pad which is contacted by said UBM structure.  
     
     
         8 . The structure of  claim 1  wherein the solder bumps are comprised of 5% SN 95% Pb.  
     
     
         9 . The structure of  claim 1  wherein the solder bumps are comprised of 63% Sn 37% Pb.  
     
     
         10 - 18 . Canceled.