US2005003634A1PendingUtilityA1

Semiconductor device separation using a patterned laser projection

Priority: Oct 23, 1998Filed: May 13, 2004Published: Jan 6, 2005
Est. expiryOct 23, 2018(expired)· nominal 20-yr term from priority
H10P 72/7422H10P 72/7416H10P 52/00H10P 72/7402H10P 54/00H10H 20/01B23K 26/0738Y10S438/94B23K 2101/40B23K 2103/50B23K 26/364B23K 26/066B23K 26/40
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Claims

Abstract

A method for separating a semiconductor wafer into several thousand devices or dies by laser ablation. Semiconductor wafers are initially pre-processed to create multiple devices, such as blue LEDs, on the wafers. The wafers are then mounted with tape coated with a generally high level adhesive. The mounted wafer is then placed on a vacuum chuck (which is itself positioned on a computer controlled positioning table) to hold it in place during the cutting process. The cutting surface is then covered with a protective layer to prevent contamination from the effluent resulting from the actual cutting process. A laser beam is generated and passed through optical elements and masks to create a pattern, such as a line or multiple lines. The patterned laser projection is directed at the wafer at a substantially normal angle and applied to the wafer until at least a partial cut is achieved through it. A mechanical separation process completes the separation when only a partial cut is achieved by the patterned laser projection. The dies are then transferred to a grip ring for further processing.

Claims

exact text as granted — not AI-modified
1 . A method for preparing a semiconductor wafer comprising the steps of: 
 providing said semiconductor wafer, the providing step including the step of, on a sapphire substrate, depositing a device layer;    directing a laser through optical elements to form a patterned laser projection; and    making a plurality of cuts in at least the sapphire substrate via laser ablation using the patterned laser projection.    
     
     
         2 . The method of  claim 1 , wherein said device layer comprises gallium nitride.  
     
     
         3 . The method of  claim 1 , wherein said device layer comprises gallium arsenide.  
     
     
         4 . The method of  claim 1 , wherein said device layer comprises aluminum nitride.  
     
     
         5 . The method of  claim 1 , wherein said device layer comprises indium nitride.  
     
     
         6 . The method of  claim 1 , wherein said device layer comprises silicon.  
     
     
         7 . The method of  claim 1 , wherein said device layer comprises III-V material.

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