Semiconductor processing methods

Abstract

In one aspect, the invention includes a semiconductor processing method. An antireflective material layer is formed over a substrate. At least a portion of the antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. The layer of photoresist is patterned. A portion of the antireflective material layer unmasked by the patterned layer of photoresist is removed. In another aspect, the invention includes the following semiconductor processing. An antireflective material layer is formed over a substrate. The antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. Portions of the layer of photoresist are exposed to radiation waves. Some of the radiation waves are absorbed by the antireflective material during the exposing.

1 - 26 . (Canceled).  
   
   
       27 . A semiconductor device comprising: 
 a substrate; and    an annealed antireflective material layer over the substrate, the antireflective material layer comprising oxygen, nitrogen and silicon, and wherein the annealing is achieved by exposing the antireflective material layer to a temperature of at least 550° C., and wherein the substrate and the antireflective material layer have an opening extending through the antireflective material layer and partially into the substrate.    
   
   
       28 . The device of  claim 27  wherein the antireflective material layer comprises from about 5% to about 37% (by atomic concentration) oxygen, from about 10% to about 35% (by atomic concentration) nitrogen, from about 50% to about 65% (by atomic concentration) silicon, and hydrogen.  
   
   
       29 . A semiconductor device comprising: 
 a substrate;    an annealed antireflective material comprising three layers over the substrate, and wherein the annealing is achieved by exposing the antireflective material layer to a temperature of at least 550° C.; and    at least one layer of the three layers comprises silicon dioxide.    
   
   
       30 . (Canceled).  
   
   
       31 . The device of  claim 27  wherein the substrate comprises monocrystalline silicon.  
   
   
       32 . The device of  claim 29  wherein the three layers comprise an elevationally uppermost layer relative the substrate, and wherein the uppermost layer comprises silicon dioxide.  
   
   
       33 . The device of  claim 29  wherein at least two of the three layers comprise silicon dioxide.  
   
   
       34 . The device of  claim 29  wherein at least one of the three layers is at least partially transparent to light radiation.  
   
   
       35 . The device of  claim 29  wherein at least two of the three layers are at least partially transparent to light radiation.