US2005030815A1PendingUtilityA1

Semiconductor memory module

Assignee: MITSUBISHI ELECTRIC CORPPriority: May 21, 2002Filed: Sep 20, 2004Published: Feb 10, 2005
Est. expiryMay 21, 2022(expired)· nominal 20-yr term from priority
H10W 90/756H10W 90/20H10W 74/00H10W 72/9445H10W 72/5525H10W 72/5524H10W 72/5449H10W 72/951H10W 72/932H10W 72/075H10W 72/59H10W 70/60H10W 90/00H10W 72/00B82Y 10/00G11C 29/832G11C 29/70G11C 5/04
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Claims

Abstract

A bare chip is provided with a pad for activation/deactivation control to which a deactivation control signal for converting a bare chip that has been detected as being defective into the deactivated condition is inputted. When a deactivation control signal is inputted to the pad for activation/deactivation control, internal circuit prevent a signal that has been inputted from the pad for data input/output control from being inputted to an internal circuit located further inside than the input buffer circuit. Thereby, the bare chip that has been detected as being defective can be converted to the deactivated condition. As a result, a semiconductor memory module can be obtained that can be repaired by newly mounting a good function chip without allowing the bare chip that has been detected as being defective to interfere with the functions of the semiconductor memory module.

Claims

exact text as granted — not AI-modified
1 . (Cancelled)  
   
   
       2 . A semiconductor memory module having a plurality of units mounted on a module substrate, wherein 
 each of the units has: a self-refresh determination circuit provided within a semiconductor chip for determining whether or not self-refreshing is carried out and for outputting a first signal in the case that it is determined that self-refreshing is carried out;    a signal input part to which a second signal, different from said first signal, can be inputted; and    a self-refreshing signal output circuit provided within said semiconductor chip for outputting a self-refresh signal for indicating the semiconductor chip is to be self-refreshed in, at least, either case where said first signal is inputted or where said second signal is inputted.    
   
   
       3 . The semiconductor memory module according to  claim 2 , wherein said plurality of semiconductor chips include a plurality of bare chips, the plurality of bare chips on said module substrate is integrally covered with a mold resin and said signal input part is provided outside of said mold resin.  
   
   
       4 - 5 . (Cancelled)  
   
   
       6 . A semiconductor memory module having a plurality of units mounted on a module substrate, wherein 
 each of the units has:    a fuse for self-refresh control that can select, according to the mode of being blown or the mode of staying unblown, whether or not said semiconductor chip is to be self-refreshed;    a self-refresh determination circuit provided within the semiconductor chip for determining whether or not self-refresh is to be carried out and for outputting a predetermined signal in the case that it has been determined for self-refresh to be carried out;    and a self-refresh indication circuit provided within said semiconductor chip for outputting a signal indicating that said semiconductor chip is to be self-refreshed in, at least, either case where said self-refresh determination circuit outputs said predetermined signal or where said fuse for self-refresh control is in the mode of carrying out self-refresh of said semiconductor chip.    
   
   
       7 . The semiconductor memory module according to  claim 6 , wherein said plurality of semiconductor chips include a plurality of bare chips, the plurality of bare chips on said module substrate is integrally covered with a mold resin, and said fuse for self-refresh control is provided outside of said mold resin.  
   
   
       8 - 20 . (Cancelled)

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