US2005090041A1PendingUtilityA1
Constructing of an electronic assembly having a decoupling capacitor
Priority: Jun 18, 2003Filed: Nov 24, 2004Published: Apr 28, 2005
Est. expiryJun 18, 2023(expired)· nominal 20-yr term from priority
H05K 2201/10734H05K 2201/10515H05K 2201/10636H05K 1/0231H05K 7/1092H05K 2201/1053H05K 1/145H05K 3/3442H05K 3/3436H10W 90/701H10W 72/07251H10W 72/20H10W 70/655H10W 72/00Y02P70/50
45
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Claims
Abstract
An electronic assembly is provided, having a capacitor interconnected between BGA solder balls. The capacitor is placed on a motherboard and soldered to the BGA solder balls when the BGA solder balls are soldered to electric lands on the motherboard.
Claims
exact text as granted — not AI-modified1 - 16 . (canceled)
17 . A method of constructing an electronic assembly, comprising:
positioning a capacitor on a first substrate; positioning a second substrate adjacent the first substrate with solid interconnection members between respective electric lands on the first substrate and respective contact pads on the second substrate and with the capacitor between the substrates; heating the interconnection members to reflow the interconnection members, two of the interconnection members reflowing onto terminals of the capacitor located between the substrates; and allowing the interconnection members to cool and solidify.
18 . The method of claim 17 , wherein the capacitor is not attached through the interconnection members to either substrate when the second substrate is positioned adjacent the first substrate.
19 . The method of claim 17 , wherein the capacitor and the interconnection members are on the first substrate before the second substrate is located on the first substrate, and wherein a microelectronic die is mounted to the second substrate.
20 . A method of constructing an electronic assembly, comprising:
attaching solder ball interconnection members to contact pads on a package substrate; mounting a microelectronic die to the package substrate; locating a capacitor on a carrier substrate; positioning the package substrate above the carrier substrate, with each solder ball interconnection member on a respective one of a plurality of electric lands on the carrier substrate, and the package substrate covering the capacitor; heating the solder ball interconnection members so that at least some of the solder ball interconnection members reflow onto the electric lands, and at least first and second ones of the solder ball interconnection members reflow onto first and second capacitor terminals, respectively, of the capacitor; and allowing the solder ball interconnection members to cool and solidify.
21 . The method of claim 20 , wherein the first solder ball interconnection member is connected to a ground plane carried by the carrier substrate, and the second solder ball interconnection member is connected to a power plane carried by the carrier substrate.
22 . The method of claim 20 , further comprising:
applying solder paste to the electric lands, the first and second terminals of the capacitor being located on the solder paste.Join the waitlist — get patent alerts
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