Analog capacitor and method of fabricating the same

Abstract

Analog capacitors, and methods of fabricating the same, include a lower electrode having a lower conductive layer, a capacitor dielectric layer on the lower conductive layer, and an upper electrode on the capacitor dielectric layer to be opposite to the lower electrode, wherein the upper electrode includes at least an upper conductive layer in contact with the capacitor dielectric layer, wherein the upper conductive layer has a resistivity higher than that of the lower conductive layer.

1 . An analog capacitor, comprising: 
 a lower electrode including a lower conductive layer;    a capacitor dielectric layer on the lower conductive layer; and    an upper electrode on the capacitor dielectric layer opposite to the lower electrode, the upper electrode including at least an upper conductive layer in contact with the capacitor dielectric layer, wherein the upper conductive layer has a resistivity higher than that of the lower conductive layer.    
   
   
       2 . The analog capacitor as claimed in  claim 1 , further comprising: 
 an oxygen-doped layer interposed between the lower conductive layer and the capacitor dielectric layer and having a resistivity higher than that of the lower conductive layer.    
   
   
       3 . The analog capacitor as claimed in  claim 2 , further comprising: 
 a lower depletion layer formed in the oxygen-doped layer in contact with the capacitor dielectric layer when a voltage is applied between the lower electrode and the upper electrode; and    an upper depletion layer formed in the upper conductive layer in contact with the capacitor dielectric layer when the voltage is applied between the lower electrode and the upper electrode.    
   
   
       4 . The analog capacitor as claimed in  claim 3 , wherein the upper depletion layer has substantially the same capacitance as that of the lower depletion layer.  
   
   
       5 . The analog capacitor as claimed in  claim 3 , wherein the lower conductive layer is a ruthenium (Ru) layer, a platinum (Pt) layer, an iridium (Ir) layer, a titanium nitride (TiN) layer, a tantalum nitride (TaN) layer, a tungsten nitride (WN) layer, a metal nitride layer containing silicon (Si), or a metal nitride layer containing aluminum (Al).  
   
   
       6 . The analog capacitor as claimed in  claim 3 , wherein the oxygen-doped layer is a metal layer containing oxygen or a metal nitride layer containing oxygen, the metal layer or the metal nitride layer being the same material as the lower conductive layer.  
   
   
       7 . The analog capacitor as claimed in  claim 3 , wherein the oxygen-doped layer is oxidized upper portion of the lower conductive layer.  
   
   
       8 . The analog capacitor as claimed in  claim 1 , wherein the capacitor dielectric layer is selected from the group consisting of a silicon oxide (SiO 2 ) layer, a silicon nitride (Si 3 N 4 ) layer, a metal oxide layer, and a perovskite dielectric layer, and a stacked layer combination thereof.  
   
   
       9 . The analog capacitor as claimed in  claim 8 , wherein the metal oxide layer is selected from the group consisting of aluminum oxide (Al 2 O 3 ) layer, a hafnium oxide (HfO 2 ) layer, a lanthanum oxide (La 2 O 3 ) layer, a zirconium oxide (ZrO 2 ) layer, and a tantalum oxide (Ta 2 O 5 ) layer, and wherein the perovskite dielectric layer is selected from the group consisting of a barium strontium titanate (BST) layer, a lead zirconate titanate (PZT) layer, a strontium bismuth tantalite (SBT) layer and a strontium titanate (ST) layer.  
   
   
       10 . The analog capacitor as claimed in  claim 1 , wherein the upper conductive layer is a tungsten (W) layer, a titanium (Ti) layer, a tantalum (Ta) layer, an aluminum (Al) layer, a copper (Cu) layer, a ruthenium (Ru) layer, a platinum (Pt) layer, an iridium (Ir) layer, a titanium nitride (TiN) layer, a tantalum nitride (TaN) layer, a tungsten nitride (WN) layer, a metal nitride layer containing silicon (Si), or a metal nitride layer containing aluminum (Al).  
   
   
       11 . The analog capacitor as claimed in  claim 1 , wherein the upper conductive layer and the lower conductive layer are made of a same material.  
   
   
       12 . The analog capacitor as claimed in  claim 11 , wherein the upper conductive layer and the lower conductive layer are made of titanium nitride (TiN).  
   
   
       13 . The analog capacitor as claimed in  claim 1 , wherein the upper conductive layer is a metal layer containing oxygen or a metal nitride layer containing oxygen.  
   
   
       14 . The analog capacitor as claimed in  claim 13 , wherein the metal layer is a ruthenium (Ru) layer, a platinum (Pt) layer or an iridium (Ir) layer, and the metal nitride layer is a titanium nitride (TiN) layer, a tantalum nitride (TaN) layer, a tungsten nitride (WN) layer, a metal nitride layer containing silicon (Si), or a metal nitride layer containing aluminum (Al).  
   
   
       15 . The analog capacitor as claimed in  claim 13 , wherein the upper conductive layer is an oxide layer of titanium nitride (TiON) when the lower conductive layer is a titanium nitride (TiN) layer.  
   
   
       16 . The analog capacitor as claimed in  claim 13 , wherein the upper conductive layer is an oxide layer of ruthenium (RuO 2 ) when the lower conductive layer is a ruthenium (Ru) layer.  
   
   
       17 . The analog capacitor as claimed in  claim 1 , wherein the upper electrode further comprises an additional upper conductive layer on the upper conductive layer, the additional upper conductive layer having a resistivity lower than that of the upper conductive layer.  
   
   
       18 . The analog capacitor as claimed in  claim 1 , wherein the capacitor dielectric layer has a positive quadratic coefficient of the capacitance-voltage plot.  
   
   
       19 . The analog capacitor as claimed in  claim 18 , further comprising: 
 an oxygen-doped layer interposed between the lower conductive layer and the capacitor dielectric layer and having a resistivity higher than that of the lower conductive layer.    
   
   
       20 . The analog capacitor as claimed in  claim 19 , further comprising: 
 a lower depletion layer and an upper depletion layer, each being formed in the oxygen-doped layer and the upper conductive layer at portions adjacent to the capacitor dielectric layer when a voltage is applied between the lower electrode and the upper electrode, wherein the lower depletion layer and the upper depletion layer reduce the quadratic coefficient of the capacitance-voltage of the capacitor dielectric layer.    
   
   
       21 . The analog capacitor as claimed in  claim 20 , wherein the upper depletion layer has a capacitance substantially equal to that of the lower depletion layer.  
   
   
       22 . The analog capacitor as claimed in  claim 21 , wherein the capacitor dielectric layer is selected from the group consisting of a silicon oxide (SiO 2 ) layer, a silicon nitride (Si 3 N 4 ) layer, a metal oxide layer, a perovskite dielectric layer, and stacked layer combination thereof, the capacitor dielectric layer including at least one dielectric layer having a positive quadratic coefficient of the capacitance-voltage plot.  
   
   
       23 . The analog capacitor as claimed in  claim 22 , wherein the at least one dielectric layer is an aluminum oxide (Al 2 O 3 ) layer, the silicon nitride (Si 3 N 4 ) layer, or a hafnium oxide (HfO 2 ) layer.  
   
   
       24 . A method of fabricating an analog capacitor, comprising: 
 forming a lower insulating layer on a semiconductor substrate;    forming a lower electrode having a lower conductive layer on the lower insulating layer;    forming a capacitor dielectric layer on the lower conductive layer; and    forming an upper electrode on the capacitor dielectric layer including at least an upper conductive layer in contact with the capacitor dielectric layer, wherein the upper conductive layer has a resistivity higher than that of the lower conductive layer.    
   
   
       25 . The method as claimed in  claim 24 , further comprising: 
 plasma-treating a surface of the lower conductive layer in an atmosphere containing nitrogen before forming the capacitor dielectric layer.    
   
   
       26 . The method as claimed in  claim 24 , wherein the upper conductive layer is formed by a deposition method capable of forming a layer having a resistivity higher than that of a layer formed by a deposition method for the lower conductive layer.  
   
   
       27 . The method as claimed in  claim 26 , wherein forming the upper conductive layer comprises using one of a chemical vapor deposition (CVD) method, a plasma enhanced chemical vapor deposition (PECVD) method, a physical vapor deposition (PVD) method, a metal organic chemical vapor deposition method, atomic layer deposition (ALD) method, and a plasma enhanced atomic layer deposition (PEALD) method.  
   
   
       28 . The method as claimed in  claim 27 , wherein the upper conductive layer is formed by the MOCVD method when the lower conductive layer is formed by the PVD method.  
   
   
       29 . The method as claimed in  claim 28 , wherein the upper conductive layer is a titanium nitride (TiN) layer formed by the MOCVD method when the lower conductive layer is a TiN layer formed by the PVD method.  
   
   
       30 . The method as claimed in  claim 24 , wherein the upper conductive layer is a tungsten (W) layer, a titanium (Ti) layer, a tantalum (Ta) layer, an aluminum (Al) layer, a copper (Cu) layer, a ruthenium (Ru) layer, a platinum (Pt) layer, an iridium (Ir) layer, a titanium nitride (TiN) layer, a tantalum nitride (TaN) layer, a tungsten nitride (WN) layer, a metal nitride layer containing silicon (Si), or a metal nitride layer containing aluminum (Al).  
   
   
       31 . The method as claimed in  claim 24 , wherein forming the upper conductive layer comprises: 
 forming an additional conductive layer on the capacitor dielectric layer; and    heat-treating the additional conductive layer in a gas atmosphere containing oxygen.    
   
   
       32 . The method as claimed in  claim 31 , wherein the additional conductive layer is a ruthenium (Ru) layer, a platinum (Pt) layer, an iridium (Ir) layer, a titanium nitride (TiN) layer, a tantalum nitride (TaN) layer, a tungsten nitride (WN) layer, a metal nitride layer containing silicon (Si), or a metal nitride layer containing aluminum (Al).  
   
   
       33 . The method as claimed in  claim 31 , wherein the additional conductive layer is formed to have a thickness less than about 100 Å.  
   
   
       34 . The method as claimed in  claim 31 , wherein the additional conductive layer is formed to have a thickness less than about 500 Å when the additional conductive layer is a material layer having good oxygen transmissivity.  
   
   
       35 . The method as claimed in  claim 34 , wherein the additional conductive layer is a ruthenium (Ru) layer or a platinum (Pt) layer.  
   
   
       36 . The method as claimed in  claim 24 , wherein the capacitor dielectric layer is formed of a dielectric layer having a positive quadratic coefficient of a capacitance-voltage plot.  
   
   
       37 . The method as claimed in  claim 36 , further comprising: 
 before forming the capacitor dielectric layer, performing heat-treatment on the lower conductive layer in a gas atmosphere containing oxygen so that a depletion layer is formed on the lower conductive layer adjacent to the capacitor dielectric layer.    
   
   
       38 . The method as claimed in  claim 36 , wherein the capacitor dielectric layer is formed of one selected from the group consisting of a silicon oxide (SiO 2 ) layer, a silicon nitride (Si 3 N 4 ) layer, a metal oxide layer, a perovskite dielectric layer, and a stacked layer combination thereof, the capacitor dielectric layer including at least one dielectric layer having a positive quadratic coefficient of the capacitance-voltage plot.  
   
   
       39 . The method as claimed in  claim 38 , wherein the at least one dielectric layer is an aluminum oxide (Al 2 O 3 ) layer, a silicon nitride (Si 3 N 4 ) layer, or an hafnium oxide (HfO 2 ) layer.