Low-mass susceptor improvements

Abstract

Improvements in the design of a low mass wafer holder are disclosed. The improvements include the use of peripherally located, integral lips to space a wafer or other substrate above the base plate of the wafer holder. A uniform gap is thus provided between the wafer and the base plate, such as will temper rapid heat exchanges, allow gas to flow between the wafer and wafer holder during wafer pick-up, and keep the wafer holder thermally coupled with the wafer. At the same time, thermal disturbance from lip contact with the wafer is reduced. Gas flow during pick-up can be provided through radial channels in a wafer holder upper surface, or through backside gas passages. A thicker ring is provided at the wafer holder perimeter, and is provided in some embodiments as an independent piece to accommodate stresses accompanying thermal gradients. Self-centering mechanisms are provided to keep the wafer holder centered relative to a spider which is subject to differential thermal expansion.

1 . A wafer holder for supporting a substrate within a process reactor, the holder having a substrate pocket defined by a surrounding wall surrounding a pocket surface in the substrate pocket, the holder comprising a plurality of spacers integral with the pocket surface, the spacers extending upwardly a uniform height above the pocket surface to support the substrate with a uniform gap between substrate and the pocket surface, the wafer holder having a thermal mass less than five times a thermal mass of a fitting substrate having outer peripheral dimensions shaped to closely fit within the surrounding wall defining the substrate pocket, the spacers extending no more than about 5 mm radially inward from the outer peripheral dimensions of the fitting substrate when the fitting substrate is held within the substrate pocket, the pocket surface extending below substantially the entire fitting substrate when the fitting substrate is held within the substrate pocket.  
   
   
       2 . The wafer holder of  claim 1 , wherein the wafer holder consists essentially of silicon carbide.  
   
   
       3 . The wafer holder of  claim 1 , comprising a base plate and an annular ring, a top surface of the base plate defining at least a portion of the wafer holder pocket surface, the annular ring defining the surrounding wall, the surrounding wall extending above the wafer holder pocket surface.  
   
   
       4 . The wafer holder of  claim 3 , wherein the ring is integrally formed with the base plate.  
   
   
       5 . The wafer holder of  claim 3 , wherein the ring comprises a shelf positioned below and radially inward of the surrounding wall, the wafer holder pocket surface comprising the base plate top surface and a ring pocket surface.  
   
   
       6 . The wafer holder of  claim 5 , wherein the spacers are integrally formed with the ring shelf.  
   
   
       7 . The wafer holder of  claim 3 , wherein each of the spacers comprises an inner face, a spacer base wider than the inner face, and a pair of spacer side walls extending between the inner face and the spacer base.  
   
   
       8 . The wafer holder of  claim 7 , wherein the spacer base is integral with the surrounding wall.  
   
   
       9 . The wafer holder of  claim 1 , wherein the wafer holder has a thermal mass less than about three times a thermal mass of the fitting substrate.  
   
   
       10 . The wafer holder of  claim 9 , wherein the thermal mass of the wafer holder is between about 0.5 and 2.0 times the thermal mass of the fitting substrate.  
   
   
       11 . The wafer holder of  claim 1 , wherein each of the spacers extends a height between about 0.010 inch and 0.030 inch above the pocket surface, and the substrate comprises a 200 mm silicon wafer.  
   
   
       12 . The wafer holder of  claim 1 , wherein each of the spacers extends a height between about 0.020 inch and 0.050 inch above the pocket surface, and the substrate comprises a 300 mm silicon wafer.  
   
   
       13 . A semiconductor reactor for treating a substrate, comprising: 
 a reaction chamber;    a wafer holder for supporting the substrate in the reaction chamber, the holder having a substrate pocket defined by an annular wall surrounding a pocket surface in the substrate pocket, the holder comprising a plurality of spacers integral with the pocket surface, the spacers extending upwardly a uniform height above the pocket surface to support the substrate with a uniform gap between substrate and the pocket surface, the wafer holder having a thermal mass less than five times a thermal mass of a fitting substrate having an outer periphery sized and shaped to closely fit within the annular wall defining the substrate pocket, the spacers extending radially inward no further than a radial inner boundary of an exclusion zone of the fitting substrate when the fitting substrate is held within the substrate pocket, the pocket surface extending below substantially the entire fitting substrate when the fitting substrate is held within the substrate pocket; and    a plurality of radiant heat sources above and below the wafer holder.    
   
   
       14 . The semiconductor reactor of  claim 13 , wherein the wafer holder consists essentially of silicon carbide.  
   
   
       15 . The semiconductor reactor of  claim 13 , wherein the wafer holder comprises a base plate and an annular ring, a top surface of the base plate defining at least a portion of the wafer holder pocket surface, the annular ring defining the annular wall, the annular wall extending above the wafer holder pocket surface.  
   
   
       16 . The semiconductor reactor of  claim 15 , wherein the annular ring is integrally formed with the base plate.  
   
   
       17 . The semiconductor reactor of  claim 15 , wherein the annular ring comprises a shelf positioned below and radially inward of the annular wall, the wafer holder pocket surface comprising the base plate top surface and a ring pocket surface.  
   
   
       18 . The semiconductor reactor of  claim 17 , wherein the spacers are integrally formed with the ring shelf.  
   
   
       19 . The semiconductor reactor of  claim 15 , wherein each of the spacers comprises an inner face, a spacer base wider than the inner face, and a pair of spacer side walls extending between the inner face and the spacer base.  
   
   
       20 . The semiconductor reactor of  claim 19 , wherein the spacer base is integral with the annular wall.  
   
   
       21 . The semiconductor reactor of  claim 13 , wherein the wafer holder has a thermal mass less than about three times a thermal mass of the fitting substrate.  
   
   
       22 . The semiconductor reactor of  claim 21 , wherein the thermal mass of the wafer holder is between about 0.5 and 2.0 times the thermal mass of the fitting substrate.  
   
   
       23 . The semiconductor reactor of  claim 13 , wherein each of the spacers extends a height between about 0.010 inch and 0.030 inch above the pocket surface, and the substrate comprises a 200 mm silicon wafer.  
   
   
       24 . The semiconductor reactor of  claim 13 , wherein each of the spacers extends a height between about 0.020 inch and 0.050 inch above the pocket surface, and the substrate comprises a 300 mm silicon wafer.