US2005230677A1PendingUtilityA1
Structure comprising tunable anti-reflective coating and method of forming thereof
Est. expiryNov 14, 2023(expired)· nominal 20-yr term from priority
H10P 76/2043H10P 50/73H10W 20/088H10W 20/086H10W 20/085H10W 20/081H10W 20/0886H10W 20/087H10D 64/011
47
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Claims
Abstract
An interconnect structure in back end of line (BEOL) applications comprising a tunable etch resistant anti-reflective (TERA) coating is described. The TERA coating can, for example, be incorporated within a single damascene structure, or a dual damascene structure. The TERA coating can serve as part of a lithographic mask for forming the interconnect structure, or it may serve as a hard mask, a chemical mechanical polishing (CMP) stop layer, or a sacrificial layer during CMP.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a semiconductor substrate; a film stack formed on the semiconductor substrate and including a tunable anti-reflective coating formed within said film stack having a structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti, and combinations thereof, and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F; and a damascene structure for a metal interconnect formed in the film stack.
2 . The device of claim 1 , wherein said tunable anti-reflective coating comprises a part of a lithographic structure during the formation of said metal interconnect in said film stack.
3 . The device of claim 1 , wherein said tunable anti-reflective coating comprises a chemical mechanical polishing (CMP) stop layer for said damascene structure.
4 . The device of claim 1 , wherein said tunable anti-reflective coating comprises at least one of a single hard mask, a top layer in a multiple layer hard mask, and an anti-reflective coating.
5 . The device of claim 1 , wherein said tunable anti-reflective coating is configured to have optical properties that substantially match the optical properties of said film stack.
6 . The device of claim 5 , wherein said optical properties comprise at least one of an index of refraction, and an extinction coefficient.
7 . The device of claim 6 , wherein said index of refraction comprises a value ranging from 1.4 to 2.6.
8 . The device of claim 6 , wherein said extinction coefficient comprises a value ranging from 0.01 to 0.78.
9 . The device of claim 6 , wherein at least one of said index of refraction and said extinction coefficient is graded along a thickness of said tunable anti-reflective coating.
10 . The device of claim 6 , wherein said index of refraction comprises a value ranging from 1.2 to 2.6.
11 . The device of claim 1 , wherein said tunable anti-reflective coating comprises at least one of chemical vapor deposition (CVD) coating, and plasma enhanced CVD coating.
12 . The device of claim 1 , wherein said tunable anti-reflective coating is configured to provide at least one of control of a critical dimension of said single damascene structure, and control of a critical dimension variation of said damascene structure.
13 . The semiconductor device of claim 1 , wherein said damascene structure is a single damascene structure.
14 . The semiconductor device of claim 1 , wherein said damascene structure is a dual damascene structure.
15 . The semiconductor device of claim 1 , wherein said film stack further comprises a low-k dielectric layer.
16 - 27 . (canceled)
28 . A semiconductor device comprising:
a semiconductor substrate; a film stack formed on the semiconductor substrate; and means for integrating a tunable anti-reflective coating with a damascene structure for a metal interconnect formed in the film stack.
29 - 35 . (canceled)Join the waitlist — get patent alerts
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