Wafer probing that conditions devices for flip-chip bonding

Abstract

A probing system or process for electrical testing of a device fabricated on a wafer also conditions terminals such as solder balls on the device to improve uniformity of the heights of the terminals and improve the reliability of connections to an interconnect substrate in a flip-chip package or to a printed circuit board in a chip-on-board application. The system can employ a probe card that is a printed circuit board and/or is substantially identical to interconnect substrates used in flip-chip packaging. The probe card can be replaceable on a test head to allow for quick changes the reduce ATE downtime and to accommodate device changes such as a die shrink. Probe tips on the probe card can be the contact pads or bumps that are the normal electrical contact structures of the interconnect substrates.

1 . A wafer probing system comprising: 
 a probe structure having probe tips with flat contact surfaces;    a tester electrically connected to the probe structure; and    a prober adapted to position a wafer relative to the probe structure so that the flat contact surfaces contact terminals on the wafer.    
   
   
       2 . The system of  claim 1 , wherein each contact surface has a width that is at least one half a width of a corresponding one of the terminals.  
   
   
       3 . The system of  claim 1 , wherein the probe structure comprises an interconnect card suitable for flip-chip packaging of a device contained in the wafer.  
   
   
       4 . The system of  claim 3 , wherein the probe tips are contact pads of the interconnect card.  
   
   
       5 . The system of  claim 3 , wherein the probe tips are contact bumps of the interconnect card.  
   
   
       6 . The system of  claim 1 , wherein the probe structure comprises a plurality of interconnect cards positioned to contact a plurality of devices contained in the wafer, each of the interconnect cards being suitable for flip-chip packaging of a respective one of the devices contained in the wafer.  
   
   
       7 . The system of  claim 1 , wherein the probe structure comprises a printed circuit board having contact pads that form the probe tips.  
   
   
       8 . The system of  claim 7 , wherein the contact pads of the printed circuit board include metal bumps.  
   
   
       9 . The system of  claim 7 , wherein the printed circuit board simultaneously contacts a plurality of devices contained in the wafer for parallel testing.  
   
   
       10 . The system of  claim 1 , wherein the probe tips are non-compliant.  
   
   
       11 . The system of  claim 1 , wherein the probe structure comprises: 
 a probe card;    a test head; and    a mounting that attaches the probe card to a test head.    
   
   
       12 . The system of  claim 11 , wherein the mounting is non-compliant.  
   
   
       13 . The system of  claim 11 , wherein the mounting is compliant.  
   
   
       14 . The system of  claim 11 , wherein the probe card comprises a printed circuit board having contact pads in a pattern that matches a pattern of the terminals on the wafer that correspond to a device.  
   
   
       15 . The system of  claim 11 , wherein the probe card comprises: 
 a first substrate;    a receptacle mounted on the first substrate; and    a second substrate in the receptacle, wherein the probe tips are on the second substrate.    
   
   
       16 . The system of  claim 11 , wherein the probe tips have sizes that depend on distances from a center point so that the probe tips can be aligned to contact the terminals over a range of temperatures.  
   
   
       17 . The system of  claim 1 , wherein the probe tips electrically connect the tester to the terminals and condition the terminals for flip-chip packaging.  
   
   
       18 . The system of  claim 17 , wherein conditioning the terminals for flip-chip packaging comprises flattening individual terminals to improve planarity of the terminals.  
   
   
       19 . A probe card for electrical testing of a device, comprising: 
 a first substrate adapted for mounting on test equipment;    a receptacle mounted on the first substrate; and    a second substrate in the receptacle, wherein the second substrate includes probe tips in a pattern that matches a pattern of terminals on the device.    
   
   
       20 . The probe card of  claim 19 , wherein the second substrate is an interconnect substrate suitable for a flip-chip package containing the device.  
   
   
       21 . The probe card of  claim 19 , wherein the receptacle permits replacement of the second substrate with a third substrate have probe tips in a pattern that differs from the pattern of probe tips on the second substrate.