US2005280051A1PendingUtilityA1
Isolation structures for imposing stress patterns
Est. expiryDec 12, 2022(expired)· nominal 20-yr term from priority
H10W 10/0145H10W 10/17H10D 30/62H10D 84/0188H10D 84/0167H10D 84/038H10D 30/795
46
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Claims
Abstract
A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate STI fill material. The STI regions are formed in the substrate layer and impose forces on adjacent substrate areas. The substrate areas under compression or tension exhibit charge mobility characteristics different from those of a non-stressed substrate. By controllably varying these stresses within NFET and PFET devices formed on a substrate, improvements in IC performance are achieved.
Claims
exact text as granted — not AI-modified1 - 8 . (canceled)
9 . A method for making devices in a substrate, the devices each having sides extending in a longitudinal direction and ends extending in a transverse direction, the method comprising:
forming a first isolation region at the sides and at the ends of a first one of the devices; providing a first isolation material in the first isolation region to apply a first type of mechanical stress on the first one of the devices in the transverse direction; and oxidizing at least a portion of the first isolation material at the ends of the first one of the devices to cause the first isolation material to apply a second type of mechanical stress on the first one of the devices in the longitudinal direction.
10 . The method of claim 9 , further comprising:
forming a second isolation region at the sides and at the ends of a second one of the devices; and providing the first isolation material in the second isolation region to apply the first type of mechanical stress on the second one of the devices in the longitudinal direction and also in the transverse direction.
11 . The method of claim 10 , wherein the step of forming a first isolation region comprises:
depositing an oxidation blocking layer over the first and second ones of the devices; and removing the oxidation blocking layer only from over the ends of the first one of the devices.
12 . The method of claim 10 , wherein the step of oxidizing at least a portion of the first isolation material comprises:
simultaneously oxidizing at least a portion of the ends of the first one of the devices.
13 . The method of claim 10 , wherein the first one of the devices is a PFET and the second one of the devices is an NFET.
14 . An isolation structure for devices formed in a substrate, the devices each having sides extending in a longitudinal direction and ends extending in a transverse direction, the structure comprising:
a first isolation region adjacent at least one side and at least one end of a first one of the devices, the first isolation region having therein a first isolation material, the first isolation material adjacent said at least one side of the first one of the devices for applying a first type of mechanical stress on the first one of the devices in the transverse direction; and an oxidized portion of the first isolation material adjacent said at least one end of the first one of the devices for applying a second type of mechanical stress on the first one of the devices in the longitudinal direction.
15 . The isolation structure of claim 14 , further comprising:
a second isolation region for a second one of the devices, the second isolation region having therein the first isolation material which applies the first type of mechanical stress on the second one of the devices in the longitudinal direction and also in the transverse direction.
16 . The isolation structure of claim 15 , wherein the first one of the devices is a PFET and the second one of the devices is an NFET.Cited by (0)
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