Inventor · disambiguated record
Bruce B. Doris
Also filed as: DORIS BRUCE · DORIS BRUCE B · DORIS BRUCE BENNETT
767 granted patents·75 pending applications·8,591 citations·filing 1993–2022
99Inventor score
Top patents by PatentIndex Score
842 records- 0199US9647139B2Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacerIBM·Filed 2015·Granted May 9, 2017·34 cites·14 claims
- 0299US9490335B1Extra gate device for nanosheetIBM·Filed 2015·Granted Nov 8, 2016·45 cites·8 claims
- 0399US9431305B1Vertical transistor fabrication and devicesIBM·Filed 2015·Granted Aug 30, 2016·57 cites·13 claims
- 0499US9362355B1Nanosheet MOSFET with full-height air-gap spacerIBM·Filed 2015·Granted Jun 7, 2016·198 cites·6 claims
- 0599US9287135B1Sidewall image transfer process for fin patterningIBM·Filed 2015·Granted Mar 15, 2016·67 cites·20 claims
- 0699US8969934B1Gate-all-around nanowire MOSFET and method of formationIBM·Filed 2013·Granted Mar 3, 2015·326 cites·4 claims
- 0799US8796093B1Doping of FinFET structuresIBM·Filed 2013·Granted Aug 5, 2014·71 cites·22 claims
- 0899US7993999B2High-K/metal gate CMOS finFET with improved pFET threshold voltageIBM·Filed 2009·Granted Aug 9, 2011·111 cites·23 claims
- 0998US9741792B2Bulk nanosheet with dielectric isolationIBM·Filed 2015·Granted Aug 22, 2017·24 cites·17 claims
- 1098US9515138B1Structure and method to minimize junction capacitance in nano sheetsIBM·Filed 2016·Granted Dec 6, 2016·33 cites·14 claims
- 1198US9349658B1Methods of forming fin isolation regions on finFET semiconductor devices using an oxidation-blocking layer of materialGLOBALFOUNDRIES INC·Filed 2015·Granted May 24, 2016·31 cites·16 claims
- 1298US9219154B1Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistorsIBM·Filed 2014·Granted Dec 22, 2015·46 cites·7 claims
- 1398US8951870B2Forming strained and relaxed silicon and silicon germanium fins on the same waferIBM·Filed 2013·Granted Feb 10, 2015·39 cites·10 claims
- 1498US8900951B1Gate-all-around nanowire MOSFET and method of formationIBM·Filed 2013·Granted Dec 2, 2014·38 cites·15 claims
- 1598US8822320B2Dense finFET SRAMIBM·Filed 2012·Granted Sep 2, 2014·38 cites·16 claims
- 1698US8653599B1Strained SiGe nanowire having (111)-oriented sidewallsIBM·Filed 2012·Granted Feb 18, 2014·39 cites·25 claims
- 1798US8169025B2Strained CMOS device, circuit and method of fabricationBEDELL STEPHEN W·Filed 2010·Granted May 1, 2012·69 cites·24 claims
- 1898US7678638B2Metal gated ultra short MOSFET devicesIBM·Filed 2008·Granted Mar 16, 2010·121 cites·10 claims
- 1998US7494861B2Method for metal gated ultra short MOSFET devicesIBM·Filed 2008·Granted Feb 24, 2009·121 cites·10 claims
- 2098US7459752B2Ultra thin body fully-depleted SOI MOSFETsIBM·Filed 2006·Granted Dec 2, 2008·283 cites·18 claims
- 2198US7348629B2Metal gated ultra short MOSFET devicesIBM·Filed 2006·Granted Mar 25, 2008·124 cites·7 claims
- 2298US7250658B2Hybrid planar and FinFET CMOS devicesIBM·Filed 2005·Granted Jul 31, 2007·164 cites·6 claims
- 2398US7224033B2Structure and method for manufacturing strained FINFETIBM·Filed 2005·Granted May 29, 2007·110 cites·9 claims
- 2498US7015082B2High mobility CMOS circuitsIBM·Filed 2003·Granted Mar 21, 2006·159 cites·12 claims
- 2598US6977194B2Structure and method to improve channel mobility by gate electrode stress modificationIBM·Filed 2003·Granted Dec 20, 2005·225 cites·5 claims
- 2698US6825529B2Stress inducing spacersIBM·Filed 2002·Granted Nov 30, 2004·234 cites·1 claims
- 2798US6717216B1SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the deviceIBM·Filed 2002·Granted Apr 6, 2004·282 cites·15 claims
- 2897US10283249B2Method for fabricating a magnetic material stackIBM·Filed 2016·Granted May 7, 2019·7 cites·15 claims
- 2997US9911592B2Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structureIBM·Filed 2016·Granted Mar 6, 2018·13 cites·19 claims
- 3097US9853132B2Nanosheet MOSFET with full-height air-gap spacerIBM·Filed 2016·Granted Dec 26, 2017·17 cites·18 claims
- 3197US9685539B1Nanowire isolation scheme to reduce parasitic capacitanceIBM·Filed 2016·Granted Jun 20, 2017·17 cites·15 claims
- 3297US9653547B1Integrated etch stop for capped gate and method for manufacturing the sameIBM·Filed 2016·Granted May 16, 2017·22 cites·17 claims
- 3397US9508829B1Nanosheet MOSFET with full-height air-gap spacerIBM·Filed 2016·Granted Nov 29, 2016·22 cites·14 claims
- 3497US9406748B1Perfectly shaped controlled nanowiresIBM·Filed 2015·Granted Aug 2, 2016·16 cites·15 claims
- 3597US9276013B1Integrated formation of Si and SiGe finsIBM·Filed 2015·Granted Mar 1, 2016·21 cites·20 claims
- 3697US8878311B2Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate sameIBM·Filed 2013·Granted Nov 4, 2014·20 cites·7 claims
- 3797US8492854B1Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate sameIBM·Filed 2012·Granted Jul 23, 2013·19 cites·6 claims
- 3897US8486776B2Strained devices, methods of manufacture and design structuresBEDELL STEPHEN W·Filed 2010·Granted Jul 16, 2013·29 cites·20 claims
- 3997US8338260B2Raised source/drain structure for enhanced strain coupling from stress linerCHENG KANGGUO·Filed 2010·Granted Dec 25, 2012·25 cites·6 claims
- 4097US8207038B2Stressed Fin-FET devices with low contact resistanceCHENG KANGGUO·Filed 2010·Granted Jun 26, 2012·29 cites·9 claims
- 4197US7432567B2Metal gate CMOS with at least a single gate metal and dual gate dielectricsIBM·Filed 2005·Granted Oct 7, 2008·58 cites·13 claims
- 4297US7329923B2High-performance CMOS devices on hybrid crystal oriented substratesIBM·Filed 2003·Granted Feb 12, 2008·138 cites·5 claims
- 4397US6974981B2Isolation structures for imposing stress patternsIBM·Filed 2002·Granted Dec 13, 2005·137 cites·2 claims
- 4496US10515859B2Extra gate device for nanosheetIBM·Filed 2017·Granted Dec 24, 2019·9 cites·20 claims
- 4596US9589956B1Semiconductor device with different fin pitchesIBM·Filed 2016·Granted Mar 7, 2017·9 cites·20 claims
- 4696US8993399B2FinFET structures having silicon germanium and silicon finsIBM·Filed 2013·Granted Mar 31, 2015·25 cites·10 claims
- 4796US8895381B1Method of co-integration of strained-Si and relaxed Si or strained SiGe FETs on insulator with planar and non-planar architecturesIBM·Filed 2013·Granted Nov 25, 2014·25 cites·25 claims
- 4896US8841189B1Transistor having all-around source/drain metal contact channel stressor and method to fabricate sameIBM·Filed 2013·Granted Sep 23, 2014·22 cites·10 claims
- 4996US8716797B2FinFET spacer formation by oriented implantationBASKER VEERARAGHAVAN S·Filed 2009·Granted May 6, 2014·29 cites·15 claims
- 5096US8530974B2CMOS structure having multiple threshold voltage devicesCHENG KANGGUO·Filed 2012·Granted Sep 10, 2013·25 cites·5 claims
Showing the top 50 of 842 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Bruce B. Doris files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →