Sensitive test structure for assessing pattern anomalies

Abstract

A subset test module and associated methodology for utilizing the same are disclosed that facilitate identification of process drift in semiconductor fabrication processing. A test wafer having a plurality of die formed thereon has a plurality of test modules formed within the die. The plurality of test modules are substantially the same from die to die, and the respective modules similarly include a plurality of test structures that are substantially the same from module to module. Corresponding test structures within respective modules on different die are inspected and compared to one another to find structures that are sensitive to process drift. One or more structures that experience differences from module to module on different die are utilized to develop one or more test modules that can be selectively located within production wafers and monitored to determine whether process drift and/or one or more other aberrant processing conditions are occurring.

1 - 15 . (canceled)  
   
   
       16 . A test wafer suitable for use in developing one or more subset test modules that are themselves suitable for use in a semiconductor fabrication process to facilitate a determination of process drift, the wafer comprising: 
 one or more die, wherein the respective die have a plurality of test modules formed thereon that are substantially the same from die to die, and wherein corresponding test modules on the respective die have a plurality of test structures formed thereon that are substantially the same from module to module, and    wherein differences in corresponding test structures on corresponding test modules are indicative of process drift or process sensitivity.    
   
   
       17 . The wafer of  claim 16 , wherein different structures within the test modules are designed so as to have a heightened sensitivity to particular processing conditions, thus facilitating generation of one or more subset modules that enable selective identification of processing conditions that may be drifting.  
   
   
       18 . The wafer of  claim 16 , wherein the test structures are formed according to design rules.  
   
   
       19 . The wafer of  claim 17 , wherein the test structures are formed in increments of about three percent of design rules.  
   
   
       20 . The method of  claim 16 , wherein the subset modules are small enough to be incorporated within scribe lines within a production wafer and/or within white spaces within die on the production wafer.  
   
   
       21 . A mechanism suitable for incorporating into a production wafer to facilitate a determination of semiconductor fabrication process drift, the mechanism comprising: 
 one or more subset modules comprising a plurality of test structures formed thereon, wherein the test structures are sensitive to process drift or other aberrant processing conditions, wherein the plurality of test structures are substantially the same among at least some of the subset modules, and wherein detected differences between corresponding test structures provide an indication that process drift or other aberrant processing conditions are occurring.    
   
   
       22 . The mechanism of  claim 21 , wherein the subset modules are small enough to be incorporated within scribe lines within a production wafer and/or within white spaces within die on the production wafer.  
   
   
       23 . The mechanism of  claim 21 , suitable of providing a determination of at least one of that process drift may be occurring across the production wafer, that process drift may be occurring from wafer to wafer and that process drift may be occurring from one wafer lot to one or more other wafer lots.