Semiconductor device having vertical metal insulator semiconductor transistors having plural spatially overlapping regions of different conductivity type

Abstract

A semiconductor device includes a diffusion area formed in a semiconductor layer of a first conductive type. The diffusion area comprises first and second impurity diffusion areas of the first and second conductive types, respectively. The diffusion area has a first and second areas which are defined by an impurity concentration of the first and second impurity diffusion areas. A junction between the first and second area is formed in a portion in which the first and second impurity diffusion areas overlap each other. A period of the impurity concentration, in a planar direction of the semiconductor layer, of the first or second area is smaller than the maximum width, in the planar direction of the semiconductor layer, of the first and second impurity diffusion areas constituting the first or second area.

1 . (canceled)  
   
   
       2 . A method of manufacturing a semiconductor device comprising: 
 injecting first impurities of a first conductive type and second impurities of a second conductive type into a surface of a first semiconductor layer of a first conductive type at a plurality of points; and    diffusing the first and second impurities to form a first diffusion area of the first conductive type and a second diffusion area of the second conductive type, the first diffusion area and the second diffusion area being defined by a first concentration profile of the first impurities and a second concentration profile of the second impurities, a junction between the first diffusion area and the second diffusion area being formed where a concentration of the first impurities and a concentration of the second impurities are same, a period of the first concentration profile in a planar direction of the first semiconductor layer being smaller than a maximum diffusion width of the first impurities in the planar direction of the first semiconductor layer.    
   
   
       3 . The method according to  claim 2 , further comprising: 
 forming a second semiconductor layer of the first conductive type on the first semiconductor layer after injecting the first and second impurities into the first semiconductor layer;    injecting third impurities of the first conductive type into the second semiconductor layer over points where the first impurities are injected in the first semiconductor layer; and    injecting fourth impurities of the second conductive type into the second semiconductor layer over points where the second impurities are injected in the first semiconductor layer, wherein    diffusing the first and second impurities further includes diffusing the first to fourth impurities until the first diffusion area and the second diffusion area extend over the first semiconductor layer and the second semiconductor layer.    
   
   
       4 . The method according to  claim 2 , wherein the first impurities include phosphorous and the second impurities include boron.  
   
   
       5 . The method according to  claim 3 , wherein the first impurities and the third impurities include phosphorous and the second impurities and the fourth impurities include boron.  
   
   
       6 . A method of manufacturing a semiconductor device comprising: 
 injecting first impurities of a first conductive type into a first semiconductor layer of the first conductive type at least at two first points;    injecting second impurities of a second conductive type into the first semiconductor layer between the two first points; and    diffusing the first impurities and the second impurities until a first concentration profile of the first impurities having a first period and a second concentration profile overlap to form a first diffusion area and a second diffusion area which are defined by the first concentration profile and the second concentration profile, the first period being smaller in a planar direction of the first semiconductor layer than a maximum diffusion width of the first impurities.    
   
   
       7 . The method according to  claim 6 , wherein the first impurities include phosphorous and the second impurities include boron.  
   
   
       8 . The method according to  claim 6 , further comprising forming the first semiconductor layer by epitaxial growth above a semiconductor substrate before injecting the first impurities and the second impurities, the first semiconductor layer having an impurity concentration equal to or less than a fifth of an impurity concentration of the first diffusion area.  
   
   
       9 . The method according to  claim 6 , further comprising: 
 forming a second semiconductor layer of the first conductive type on the first semiconductor layer after injecting the first impurities and the second impurities into the first semiconductor layer;    injecting third impurities of the first conductive type into the second semiconductor layer over points where the first impurities are injected in the first semiconductor layer; and    injecting fourth impurities of the second conductive type into the second semiconductor layer over points where the second impurities are injected in the first semiconductor layer, wherein diffusing the first impurities and the second impurities further includes diffusing the first to fourth impurities until the first diffusion area and the second diffusion area extend over the first semiconductor layer and the second semiconductor layer.    
   
   
       10 . The method according to  claim 9 , wherein the first impurities and the third impurities include phosphorous and the second impurities and the fourth impurities include boron.  
   
   
       11 . The method according to  claim 9 , further comprising forming the first semiconductor layer by epitaxial growth above a semiconductor substrate before injecting the first impurities and the second impurities, the first semiconductor layer having an impurity concentration equal to or less than a fifth of an impurity concentration of the first diffusion area, wherein 
 forming a second semiconductor layer includes forming by epitaxial growth the second semiconductor layer having an impurity concentration equal to or less than a fifth of an impurity concentration of the first diffusion area.    
   
   
       12 . The method according to  claim 6 , wherein 
 injecting the first impurities includes injecting the first impurities at a plurality of points,    injecting the second impurities includes injecting the second impurities at a plurality of points between the plurality of points where the first impurities are injected,    the second concentration profile has a second period which is smaller in the planar direction of the first semiconductor layer than a maximum diffusion width of the second impurities, and    plural of said first diffusion area and said second diffusion area are formed in the first semiconductor layer.    
   
   
       13 . The method according to  claim 6 , wherein the plurality of points where the first impurities are injected are apart from each other at 6 to 18 μm and the plurality of points where the second impurities are injected are apart from each other at 6 to 18 μm.  
   
   
       14 . The method according to  claim 6 , further comprising forming a third diffusion area in an end region which is formed between an end of an first semiconductor layer and a MISFET region where the plural of the first diffusion area and the plural of the second diffusion area are formed.  
   
   
       15 . The method according to  claim 6 , further comprising: 
 forming a base area of the second conductive type in a surface of the first semiconductor layer and connected to the second diffusion area;    forming a source area of the first conductive type in the base area;    forming a source electrode on the surface of the first semiconductor layer so as to cover a part of the source area;    forming a gate electrode on the surface of the first semiconductor layer with a gate insulating film interposed therebetween so as to cover a part of the base area, source area, and first diffusion area;    forming an insulating film in the end region and on the surface of the first semiconductor layer, the insulating film having a height increasing toward the end of the first semiconductor layer; and    forming a first electrode on the insulating film, the first electrode being connected to the source electrode or the gate electrode.    
   
   
       16 . The method according to  claim 6 , further comprising forming a third diffusion area and a fourth diffusion area having substantially a same structure as the first diffusion area and the second diffusion area, respectively, in an end region which is formed between an end of an first semiconductor layer and a MISFET region where a plural of the first diffusion area and a plural of the second diffusion area are formed  
   
   
       17 . The method according to  claim 6 , wherein the third diffusion area and the fourth diffusion area meet:  
       0.5<( S 1 ×Qd 1)/( S 2 ×Qd 2)<1.5  where Qd1: dose of impurities used when ions are injected to form the third diffusion area,    Qd2: dose of impurities used when ions are injected to form the fourth diffusion area,    S1: area in which ions are injected to form the third diffusion area, and    S2: area in which ions are injected to form the fourth diffusion area.    
   
   
       18 . The method according to  claim 16 , wherein the third diffusion area and the fourth diffusion area are formed to be substantially linear in a plane of the first semiconductor layer.  
   
   
       19 . The method according to  claim 16 , wherein the third diffusion area and the fourth diffusion area are formed to be substantially radial in a plane of the first semiconductor layer.  
   
   
       20 . The method according to  claim 16 , wherein the third diffusion area and the fourth diffusion area form a substantial lattice in a plane of the first semiconductor layer.  
   
   
       21 . A method of manufacturing a semiconductor device comprising: 
 forming a first semiconductor layer by epitaxial growth on a semiconductor substrate;    injecting first impurities of the first conductive type and second impurities of a second conductive type into the first semiconductor layer, points where the first impurities are injected and points where the second impurities are injected being apart from each other;    conducting formation of an i-th semiconductor layer on the (i−1)-th semiconductor layer by epitaxial growth and i-th injection of the first impurities and the second impurities into the i-th semiconductor layer over points where the first impurities and the second impurities are injected in the (i−1)-th semiconductor layer respectively, i being a natural number at least two, a set of the formation of an i-th semiconductor layer and the i-th injection being repeated with i=i+1 for every set until n-th semiconductor layer is formed and n-th injection is conducted, n being a natural number at least two;    diffusing the first impurities and the second impurities to form a first diffusion area of the first conductive type and a second diffusion area of the second conductive type, the first diffusion area and the second diffusion area extending over the first semiconductor layer to the n-th semiconductor layer, the first diffusion area and the second diffusion area being defined by a first concentration profile of the first impurities and a second concentration profile of the second impurities, a junction between the first diffusion area and the second diffusion area being formed where a concentration of the first impurities and a concentration of the second impurities are same.    
   
   
       22 . The method according to  claim 21 , wherein the first impurities include phosphorous and the second impurities include boron.  
   
   
       23 . The method according to  claim 21 , wherein the first semiconductor layer to the n-th semiconductor layer have an impurity concentration equal to or less than a fifth of an impurity concentration of the first diffusion area.