Semiconductor memory device having a gate electrode and a diffusion layer and a manufacturing method thereof

Abstract

A semiconductor memory device having a gate electrode and a diffusion layer, comprising a plurality of memory cells each of which including the gate electrode and the diffusion layers; a first contact layer connected to one of the diffusion layer of the memory cell; a second contact layer connected to the first contact layer; a bit line connected to the second contact layer; and a conductive layer connected to at least two of the diffusion layers that are other than the diffusion layer connected to the first contact layer, at least two of the diffusion layers being arranged in a direction vertical to the bit line, a height of the conductive layer substantially being same as a height of the first contact layer.

1 - 30 . (canceled)  
   
   
       31 . A method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer, comprising: 
 forming a plurality of memory cells each of which including the gate electrode and the diffusion layer;    forming a first interlayer insulating film among the gate electrodes of the plurality of the memory cells;    forming a first contact hole and a second contact hole, the first contact hole reaches one of the diffusion layers of the plurality of the memory cells and the second contact hole reaches at least two of the diffusion layers of the plurality of the memory cells;    forming a first conductive layer in the first contact hole and a second conductive layer in the second contact hole;    forming a second interlayer insulating film on the first interlayer insulating film;    forming a third contact hole in the second interlayer insulating film;    forming a third conductive layer in the third contact hole, the third conductive layer connected to the first conductive layer; and    forming a bit line connected to the third conductive layer.    
   
   
       32 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , a height of the first conductive layers is same as that of the second conductive layer.  
   
   
       33 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , the forming of the first contact layer is steps of forming a first conductive film in the first contact hole, and forming a second conductive film on the first conductive film in the first contact hole.  
   
   
       34 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , the forming of the second contact layer is steps of a first conductive film in the first contact hole, and forming a second conductive film on the first conductive film in the first contact hole.  
   
   
       35 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , further comprising, forming an insulating film to cover the gate electrodes of the plurality of the memory cells after forming the plurality of memory cells.  
   
   
       36 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 35 , the insulating film is a silicon nitride.  
   
   
       37 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , the forming of a first interlayer insulating film among the gate electrodes comprises steps of forming the first interlayer insulating film, and removing portion of the first interlayer insulating film so as to expose an upper surface of the insulating film that is formed to cover the gate electrode.  
   
   
       38 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 31 , the forming of a first interlayer insulating film among the gate electrodes comprises steps of forming the first interlayer insulating film, and removing portion of the first interlayer insulating film so as to keep the first interlayer insulating film above the gate electrode.  
   
   
       39 . A method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer, comprising: 
 forming a plurality of memory cells each of which including the gate electrode and the diffusion layer;    forming a first interlayer insulating film among the gate electrodes of the plurality of the memory cells;    removing portions of the first interlayer insulating film and forming a first contact hole and a second contact hole, the first contact hole reaches one of the diffusion layers of the plurality of the memory cells and the second contact hole reaches at least two of the diffusion layers of the plurality of the memory cells;    forming a first conductive layer in the first contact hole and a second conductive layer in the second contact hole;    forming a second interlayer insulating film on the first interlayer insulating film, the first conductive layer, and the second conductive layer;    removing a portion of the second interlayer insulting film and forming a third contact hole;    forming a third conductive layer in the third contact hole, the third conductive layer connected to the first conductive layer; and    forming a bit line connected to the third conductive layer.    
   
   
       40 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , the forming of the first contact layer is steps of forming a first conductive film in the first contact hole, and forming a second conductive film on the first conductive film in the first contact hole.  
   
   
       41 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , the forming of the second contact layer is steps of forming a first conductive film in the first contact hole, and forming a second conductive film on the first conductive film in the first contact hole.  
   
   
       42 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , further comprising, forming an insulating film to cover the gate electrodes of the plurality of the memory cells after forming the plurality of memory cells.  
   
   
       43 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 42 , the insulating film is a silicon nitride.  
   
   
       44 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , the forming of a first interlayer insulating film among the gate electrodes comprises steps of forming the first interlayer insulating film, and removing portion of the first interlayer insulating film so as to expose an upper surface of the insulating film that is formed to cover the gate electrode.  
   
   
       45 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , the forming of a first interlayer insulating film among the gate electrodes comprises steps of forming the first interlayer insulating film, and removing portion of the first interlayer insulating film so as to keep the first interlayer insulating film above the gate electrode.  
   
   
       46 . The method of manufacturing a semiconductor memory device having a gate electrode and a diffusion layer according to  claim 39 , a height of the first conductive layers is same as that of the second conductive layer.