US2006223237A1PendingUtilityA1
Method of manufacturing enhanced thermal dissipation integrated circuit package
Individually held — no corporate assignee on recordPriority: Jul 11, 2001Filed: Mar 6, 2006Published: Oct 5, 2006
Est. expiryJul 11, 2021(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/724H10W 76/63H10W 74/00H10W 72/5522H10W 72/5363H10W 72/884H10W 72/877H10W 72/536H10W 74/117H10W 40/778H10W 40/10H10W 70/02
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Claims
Abstract
The present invention relates to an integrated circuit package having a thermally conductive element thermally coupled to a semiconductor die and a heat sink, and a method of manufacturing said integrated circuit package. The thermally conductive element is integrated into the package to enhance thermal dissipation characteristics of the package.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing an integrated circuit package, comprising:
installing a carrier onto an upper surface of a substrate, wherein said carrier defines a cavity; attaching a semiconductor die to said upper surface of said substrate within said cavity of said carrier; aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element; resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die; and encapsulating said cavity to form a prepackage such that a portion of said heat sink is exposed to the surroundings of said package.
2 . The method of claim 1 , wherein said assembly is rested on said carrier such that said thermally conductive element and said semiconductor die are separated by a distance of about five (5) mils or less.
3 . The method of claim 1 , wherein said attaching said semiconductor die to said upper surface of said substrate is by a direct chip attachment.
4 . The method of claim 1 , further comprising singulating said prepackage to form said package, wherein a top portion and a side portion of said heat sink are exposed to the surroundings of said package.
5 . A method of manufacturing an integrated circuit package, comprising:
installing a carrier onto a substrate; attaching a semiconductor die to said substrate; aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element; resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die; and encapsulating said thermally conductive element and said heat sink such that a portion of said heat sink is exposed to the surroundings of said package.Join the waitlist — get patent alerts
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