Gate dielectric layer and method of forming the same

Abstract

A method of forming a gate dielectric is described. A plasma treatment process is performed to form a dielectric structure on a substrate, wherein the dielectric structure having a graded dielectric constant value that decreases gradually in a direction toward the substrate.

1 - 19 . (canceled)  
   
   
       20 . A gate dielectric layer, comprising a single-layered dielectric layer structure, wherein the single-layered dielectric layer structure has a graded dielectric constant value that decreases from a top of the single-layered dielectric layer structure towards a bottom of the single-layered dielectric layer structure.  
   
   
       21 . The gate dielectric layer as recited in  claim 20 , wherein the graded dielectric constant value is between 3.9˜7.  
   
   
       22 . The gate dielectric layer as recited in  claim 20 , wherein a surface of the single-layered dielectric layer structure in contact with the substrate comprises silicon oxide.  
   
   
       23 . The gate dielectric layer as recited in  claim 20 , wherein a top surface of the single-layered dielectric layer structure comprises silicon nitride.  
   
   
       24 . A gate, comprising: 
 a substrate;    a single-layered dielectric layer disposed on the substrate, wherein the single-layered dielectric layer has a graded dielectric constant value that decreases toward the substrate; and    a conducting layer disposed on the single-layered dielectric layer.    
   
   
       25 . The gate as recited in  claim 24 , wherein the graded dielectric constant value is between 3.9˜7.  
   
   
       26 . The gate as recited in  claim 24 , wherein a material constituting the conducting layer comprises polysilicon.  
   
   
       27 . The gate as recited in  claim 24 , wherein a surface of the single-layered dielectric layer in contact with the substrate comprises silicon oxide.  
   
   
       28 . The gate as recited in  claim 24 , wherein a surface of the single-layered dielectric layer in contact with the conducting layer comprises silicon nitride.  
   
   
       29 . A gate dielectric layer, comprising a single-layered dielectric layer structure, wherein the single-layered dielectric layer structure has a graded oxygen-atom concentration increasing from the top of the single-layered dielectric layer structure toward the bottom of the single-layered dielectric layer structure and has a graded nitrogen-atom concentration decreasing from a top of the dielectric layer structure towards a bottom of the dielectric layer structure.  
   
   
       30 . The gate dielectric layer as recited in  claim 29 , wherein the single-layered dielectric layer structure has a graded dielectric constant between 3.9˜7 from the bottom of the single-layered dielectric layer structure toward the top of the single-layered dielectric layer structure.  
   
   
       31 . The gate dielectric layer as recited in  claim 29 , wherein a surface of the single-layered dielectric layer in contact with the substrate is made of silicon oxide.  
   
   
       32 . The gate dielectric layer as recited in  claim 29 , wherein a top surface of the single-layered dielectric layer is made of silicon nitride.  
   
   
       33 . The gate dielectric layer as recited in  claim 20 , wherein a ratio of nitrogen atoms to oxygen atoms (N 2 /O 2 ) in the single-layered dielectric layer structure decreases from the top of the dielectric layer structure towards the bottom of the dielectric layer structure.  
   
   
       34 . The gate as recited in  claim 24 , wherein a ratio of nitrogen atoms to oxygen atoms (N 2 /O 2 ) in the single-layered dielectric layer decreases from the top of the dielectric structure towards the bottom of the dielectric structure.