Semiconductor package having ultra-thin thickness and method of manufacturing the same

Abstract

A semiconductor package having an ultra thin thickness and a method of manufacturing the same are provided. The ultra thin semiconductor package comprises a circuit board in which a through hole is formed. A semiconductor chip is located in the through hole and a connecting element electrically connects the circuit board and the semiconductor chip. An epoxy molding compound (EMC) covers the semiconductor chip and the connecting element and a supporter having a thermal expansion coefficient similar to the EMC is attached inside the through hole on a lower surface of the semiconductor chip. An external connecting terminal is attached to at least one side of the circuit board. Because of the inclusion of the supporter, warpage of the semiconductor package resulting from the curing of the EMC is prevented.

1 . A method of manufacturing a semiconductor package, the method comprising: 
 forming a circuit board;    forming a through hole in the circuit board;    attaching a closure member to a lower surface of the circuit board, thereby covering the through hole;    forming a supporter on an upper surface of the closure member;    attaching a semiconductor chip to an upper surface of the supporter, the chip having an input/output on its upper edge;    electrically connecting the input/output pad of the semiconductor chip and the circuit board;    forming an epoxy molding compound (EMC) that covers at least part of the semiconductor chip, and the circuit board;    attaching a solder ball to the lower surface of the circuit board; and    removing the closure member.    
   
   
       2 . The method of  claim 1 , wherein the forming the circuit board includes: 
 preparing a resin board having a first surface and a second surface on an opposite side of the resin board;    forming a first circuit pattern in the first surface of the resin board;    etching the resin board to form a via hole therethrough and to expose the first circuit pattern;    forming a conductive stud in the via hole; and    forming a second circuit pattern in contact with the conductive stud on the second surface of the resin board.    
   
   
       3 . The method of  claim 2 , wherein forming a through hole occurs before forming the first circuit pattern in the first surface of the resin board or after forming the second circuit pattern.  
   
   
       4 . The method of  claim 2 , wherein the closure member is an insulating or ultraviolet tape.  
   
   
       5 . The method of  claim 2 , wherein the forming of the supporter comprises: 
 preparing a square plate smaller than the through hole; and    attaching the plate to an upper portion of the supporter with an adhesive.    
   
   
       6 . The method of  claim 2 , wherein the forming of the supporter includes: 
 coating a liquid material used for a supporter on the upper surface of the closure member; and    curing the liquid material to be a square shape.    
   
   
       7 . The method of  claim 2 , wherein the forming of the EMC includes: 
 coating a resin material on an upper portion of the semiconductor chip, the connecting element, and the circuit board; and    curing the resin material.