Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines

Abstract

In one implementation, a method of forming a field effect transistor includes etching an opening into source/drain area of a semiconductor substrate. The opening has a base comprising semiconductive material. After the etching, insulative material is formed within the opening over the semiconductive material base. The insulative material less than completely fills the opening and has a substantially uniform thickness across the opening. Semiconductive source/drain material is formed within the opening over the insulative material within the opening. A transistor gate is provided operatively proximate the semiconductive source/drain material. Other aspects and implementations are contemplated.

1 - 61 . (canceled)  
   
   
       62 . A method of forming a field effect transistor having a conductive gate received over a gate dielectric and having lightly doped drain regions formed within semiconductive material, the method comprising: 
 doping the semiconductive material effective to form the lightly doped drain regions prior to forming any conductive gate material for the transistor gate;    after forming the lightly doped drain regions and prior to forming any conductive gate material for the transistor gate, forming anisotropically etched sidewall spacers over the lightly doped drain regions; and    removing the anisotropically etched sidewall spacers from over the lightly doped drain regions prior to forming any conductive gate material for the transistor gate.    
   
   
       63 . The method of  claim 62  wherein the spacers are electrically insulative.  
   
   
       64 . A method of forming a field effect transistor having a conductive gate received over a gate dielectric and having a lightly doped drain formed within semiconductive material, the method sequentially comprising: 
 doping semiconductive material effective to form lightly doped drain material prior to forming any conductive gate material for the transistor gate, the lightly doped drain material being received within a region of the substrate within which semiconductive source/drain material for the transistor gate will be subsequently deposited;    etching an opening into said region;    depositing semiconductive source/drain material within the opening in said region; and    forming conductive gate material for the transistor gate.    
   
   
       65 . The method of  claim 64  wherein the semiconductive source/drain material comprises polysilicon.