Chip-on-board assemblies
Abstract
An apparatus and method for preventing damage to tape attachment semiconductor assemblies due to encapsulation filler particles causing damage to a semiconductor die active surface and/or to a corresponding semiconductor substrate surface by providing an adhesive tape which extends across areas of contact between the semiconductor die active surface and the semiconductor substrate. The present invention also includes extending the adhesive tape beyond the areas of contact between the semiconductor die active surface and the semiconductor substrate to provide a visible surface of visual inspection of proper adhesive tape placement.
Claims
exact text as granted — not AI-modified1 . An assembly comprising:
a semiconductor substrate having a first surface and a second surface, the semiconductor substrate including at least one opening extending therethrough between the semiconductor substrate first surface and the semiconductor substrate second surface; at least one semiconductor die having an active surface with at least one electrical connection area disposed on the semiconductor die active surface, the at least one semiconductor die oriented having the at least one electrical connection area substantially aligned with the at least one semiconductor substrate opening; and at least one piece of adhesive tape located between the semiconductor die active surface and the semiconductor substrate first surface, a width of the at least one piece of adhesive tape extending beyond at least one of an edge of the at least one semiconductor substrate opening and an edge of the at least one semiconductor die to provide a detectable surface of the at least one piece of adhesive tape.
2 . The assembly of claim 1 , further including at least one electrical connection extending between the at least one electrical connection area and at least one trace on the semiconductor substrate second surface.
3 . The assembly of claim 2 , wherein the at least one electrical connection comprises a bond wire.
4 . The assembly of claim 3 , wherein the at least one electrical connection comprises a TAB connection.
5 . The assembly of claim 1 , further including a glob top material disposed within the at least one semiconductor substrate opening encasing the at least one electrical connection.
6 . The assembly of claim 5 , further including an encapsulant material encasing the at least one semiconductor die and the glob top material.
7 . The assembly of claim 1 , wherein the at least one adhesive tape comprises a planar carrier film including a first surface having a first adhesive disposed thereon and a second surface having a second adhesive disposed thereon.
8 . A method of fabricating a semiconductor die assembly having a semiconductor substrate and a semiconductor die comprising:
disposing at least one adhesive tape between the semiconductor die active surface and the first surface of the semiconductor substrate for attaching the semiconductor die to the semiconductor substrate, a width of the at least one adhesive tape extending adjacent an edge of the semiconductor die to adjacent an edge of the semiconductor substrate opening; and aligning the semiconductor die such that the at least one electrical connection area is oriented with the at least one semiconductor substrate opening.
9 . The method of claim 8 , wherein the disposing at least one adhesive tape between the semiconductor die active surface and the semiconductor substrate first surface includes disposing at least one adhesive tape wherein a width of the at least one adhesive tape extends beyond the at least one semiconductor substrate opening edge a distance into the at least one semiconductor substrate opening to provide a detectable surface within the at least one semiconductor substrate opening.
10 . The method of claim 8 , wherein the disposing at least one adhesive tape between the semiconductor die active surface and the semiconductor substrate first surface includes disposing at least one adhesive tape wherein a width of the at least one adhesive tape extends beyond the at least one semiconductor die edge a distance on the semiconductor substrate first surface to provide a detectable adhesive tape surface on the semiconductor substrate first surface.
11 . The method of claim 8 , further including attaching at least one electrical connection between the at least one electrical connection area and at least one trace on the semiconductor substrate second surface.
12 . The method of claim 11 , wherein the attaching the at least one electrical connection comprises attaching a bond wire between the at least one electrical connection area and at least one trace on the semiconductor substrate second surface.
13 . The method of claim 12 , wherein the attaching the at least one electrical connection comprises attaching a TAB connection between the at least one electrical connection area and at least one trace on the semiconductor substrate second surface.
14 . The method of claim 12 , further including disposing a glob top material within the at least one semiconductor substrate opening to encase the at least one electrical connection.
15 . The method of claim 14 , further including encasing the semiconductor die and the glob top material with an encapsulant material.
16 . The method of claim 8 , wherein the disposing at least one adhesive tape between the semiconductor die active surface and the semiconductor substrate first surface includes disposing at least one adhesive tape comprising a planar carrier film including a first surface having a first adhesive disposed thereon and a second surface having a second adhesive disposed thereon between the semiconductor die active surface and the semiconductor substrate first surface.
17 . The method of claim 8 , further comprising forming at least one fillet proximate the at least one adhesive tape and the at least one semiconductor die edge.
18 . The method of claim 8 , further comprising forming at least one fillet proximate the at least one adhesive tape and the at least one semiconductor substrate opening edge.
19 . The method of claim 8 , further comprising forming at least one fillet proximate the at least one adhesive tape and the at least one semiconductor die active surface.
20 . The method of claim 8 , further comprising forming at least one fillet proximate the at least one adhesive tape.
21 . An assembly method for a semiconductor substrate and a semiconductor die comprising:
disposing at least one adhesive tape between the semiconductor die active surface and the first surface of the semiconductor substrate for attaching the semiconductor die to the semiconductor substrate, a width of the at least one adhesive tape extending adjacent an edge of the semiconductor die to adjacent an edge of the semiconductor substrate opening; and aligning the semiconductor die such that the at least one electrical connection area is oriented with the at least one semiconductor substrate opening.
22 . A method of attaching a semiconductor substrate and a semiconductor die comprising:
disposing at least one adhesive tape between the semiconductor die active surface and the first surface of the semiconductor substrate for attaching the semiconductor die to the semiconductor substrate, a width of the at least one adhesive tape extending adjacent an edge of the semiconductor die to adjacent an edge of the semiconductor substrate opening; and aligning the semiconductor die such that the at least one electrical connection area is oriented with the at least one semiconductor substrate opening.
23 . A computer comprising:
at least one semiconductor die assembly, the semiconductor die assembly comprising: a semiconductor substrate having a first surface and a second surface, wherein the semiconductor substrate includes at least one opening defined through the semiconductor substrate between the semiconductor substrate first surface and the semiconductor substrate second surface; at least one semiconductor die having an active surface with at least one electrical connection area disposed on the semiconductor die active surface; at least one adhesive tape interposed between and attaching the semiconductor die active surface and the semiconductor substrate first surface, wherein a width of the at least one adhesive tape extends proximate an edge of the at least one semiconductor die to proximate an edge of the semiconductor substrate opening; and said at least one semiconductor die oriented such that the at least one electrical connection area is aligned with the at least one semiconductor substrate opening.Join the waitlist — get patent alerts
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