US2007090444A1PendingUtilityA1

Nonvolatile memory device including nano dot and method of fabricating the same

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Oct 21, 2005Filed: Oct 23, 2006Published: Apr 26, 2007
Est. expiryOct 21, 2025(expired)· nominal 20-yr term from priority
H10B 69/00H10N 70/8833H10N 70/20H10N 70/021H10B 63/30H10N 70/828H10N 70/826H10B 99/14B82Y 10/00
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Claims

Abstract

A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.

Claims

exact text as granted — not AI-modified
1 . A nonvolatile memory device including a nano dot, the nonvolatile memory device comprising: 
 a lower electrode;    an oxide layer on the lower electrode;    a nano dot in the oxide layer; and    an upper electrode on the oxide layer.    
   
   
       2 . The nonvolatile memory device of  claim 1 , wherein the oxide layer includes a resistance changing material.  
   
   
       3 . The nonvolatile memory device of  claim 1 , wherein the oxide layer includes a transition metal oxide.  
   
   
       4 . The nonvolatile memory device of  claim 1 , wherein the nano dot unifies current paths inside the oxide layer.  
   
   
       5 . The nonvolatile memory device of  claim 1 , wherein the nano dot includes a metal.  
   
   
       6 . The nonvolatile memory device of  claim 1 , wherein the oxide layer includes at least one material consisting of nickel oxide (NiO), titanium dioxide (TiO 2 ), hafnium oxide (HfO), zirconium oxide (ZrO), zinc oxide (ZnO), tungsten oxide (WO 3 ), cobalt oxide (CoO) and niobium oxide (Nb 2 O 5 ).  
   
   
       7 . The nonvolatile memory device of  claim 1 , wherein the lower electrode includes a metal selected from the group including aluminum (Al), gold (Au), platinum (Pt), ruthenium (Ru), iridium (Ir), titanium (Ti) or a metal oxide thereof.  
   
   
       8 . The nonvolatile memory device of  claim 1 , wherein the nano dot is in the middle region of the oxide layer.  
   
   
       9 . The nonvolatile memory device of  claim 1 , the nonvolatile memory device further comprising: 
 a substrate;    a first impurity region and a second impurity region on the substrate, wherein the lower electrode is electrically connected to the second impurity region; and    a gate insulating layer and a gate electrode layer on the substrate and contacting the first and second impurity regions.    
   
   
       10 . The nonvolatile memory device of  claim 1 , the nonvolatile memory device further comprising: 
 a metal electrode; and    a diode structure on the metal electrode, wherein the lower electrode is formed on the diode structure.    
   
   
       11 . A method of fabricating a nonvolatile memory device including a nano dot, the method comprising: 
 forming a first oxide layer on a lower electrode;    forming a nano dot on a surface of the first oxide layer;    forming a second oxide layer on the first oxide layer and the nano dot; and    forming an upper electrode on the second oxide layer.    
   
   
       12 . The method of  claim 11 , wherein forming the first and second oxide layers includes forming the first and second oxide layers of a resistance changing material.  
   
   
       13 . The method of  claim 11 , wherein forming the first and second oxide layers includes forming a transition metal oxide.  
   
   
       14 . The method of  claim 11 , wherein forming the nano dot includes forming a metal.  
   
   
       15 . The method of  claim 11 , wherein forming the lower electrode includes forming a metal selected from the group including aluminum (Al), gold (Au), platinum (Pt), ruthenium (Ru), iridium (Ir), titanium (Ti) or a metal oxide thereof.  
   
   
       16 . The method of  claim 11 , wherein forming the nano dot includes unifying current paths inside the oxide layer.  
   
   
       17 . The method of  claim 11 , wherein forming the first oxide layer and the second oxide layer includes forming at least one material consisting of NiO, TiO 2 , HfO, ZrO, ZnO, WO 3 , CoO and Nb 2 O 5 .  
   
   
       18 . The method of  claim 11 , wherein the forming of the nano dot on the surface of the oxide layer comprises: 
 forming an electrical charging point having a first polarity on the surface of the oxide layer, using a focused ion beam; and    forming a second nano dot on the electrical charging point, by applying a material having a second polarity opposite to that of the electrical charging point on the surface of the oxide layer.    
   
   
       19 . The method of  claim 11 , further comprising: 
 providing a substrate;    forming a first impurity region and a second impurity region on the substrate;    forming a gate insulating layer and a gate electrode layer on the substrate and contacting the first and second impurity regions; and    electrically connecting the lower electrode to the second impurity region.    
   
   
       20 . The method of  claim 11 , further comprising: 
 providing a metal electrode;    forming a diode structure on the metal electrode; and    forming the lower electrode on the diode structure.

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