US2007090855A1PendingUtilityA1

Method and apparatus for testing bumped die

Individually held — no corporate assignee on recordPriority: Dec 18, 1997Filed: Nov 17, 2006Published: Apr 26, 2007
Est. expiryDec 18, 2017(expired)· nominal 20-yr term from priority
Inventors:James M. Wark
G01R 31/2831G01R 1/0483H05K 3/325G01R 31/2886H05K 3/4007G01R 1/07307
48
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Claims

Abstract

An apparatus for testing unpackaged semiconductor dice having raised ball contact locations is disclosed. The apparatus uses a temporary interconnect wafer that is adapted to establish an electrical connection with the raised ball contact locations on the die without damage to the ball contact locations. The interconnect is fabricated on a substrate, such as silicon, where contact members are formed in a pattern that matches the size and spacing of the ball contact locations on the die to be tested. The contact members on the interconnect wafer are formed as either pits, troughs, or spike contacts. The spike contacts penetrate through the oxide layer formed on the raised ball contact locations. Conductive traces are provided in both rows and columns and are terminated on the inner edges of the walls of the pits formed in the substrate.

Claims

exact text as granted — not AI-modified
1 . An apparatus for testing for the presence of a ball in a plurality of balls located on the bond pads of a semiconductor die, comprising: 
 a signal processor; and    a bump wafer connected to the signal processor, comprising: 
 a plurality of contact points formed in a semiconductor substrate having a pattern essentially corresponding to a pattern of the plurality of balls on the semiconductor die;  
 a plurality of metal traces fabricated on the semiconductor substrate for at least one of the plurality of contact points such that the placement of a contact ball on the at least one of the plurality of contact points connects one of a first plurality of metal traces to a second plurality of metal traces.  
   
   
   
       2 . The apparatus according to  claim 1 , wherein the plurality of metal traces form an array of rows and columns interconnecting at least one of the plurality of contact points to at least one adjacent contact point.  
   
   
       3 . The apparatus according to  claim 1 , wherein the plurality of contact points comprise pits fabricated in the semiconductor substrate, each pit having opposing walls wherein some of the plurality of metal traces extend down the opposing walls without contacting one another.  
   
   
       4 . The apparatus according to  claim 1 , wherein the plurality of contact points comprise: 
 a plurality of risers, over which the plurality of metal traces extend; and    a plurality of blades, situated between the plurality of risers, to pierce an oxide layer on the contact ball.    
   
   
       5 . The apparatus according to  claim 1 , wherein at least one contact point of the plurality of contact points comprises: 
 a plurality of retaining posts, over each of which extends one of the plurality of metal traces and in which a bump seat is formed for receiving the contact ball.    
   
   
       6 . The apparatus according to  claim 1 , wherein the signal processor selectively applies and senses an electrical current to each of the plurality of metal traces.

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