Method of forming a field effect transistor

Abstract

In one implementation, a method of forming a field effect transistor includes etching an opening into source/drain area of a semiconductor substrate. The opening has a base comprising semiconductive material. After the etching, insulative material is formed within the opening over the semiconductive material base. The insulative material less than completely fills the opening and has a substantially uniform thickness across the opening. Semiconductive source/drain material is formed within the opening over the insulative material within the opening. A transistor gate is provided operatively proximate the semiconductive source/drain material. Other aspects and implementations are contemplated.

1 - 36 . (canceled)  
   
   
       37 . A method of forming a field effect transistor gate over a semiconductor substrate, comprising: 
 forming an active area and a field isolation trench within semiconductive material of a semiconductor substrate;    depositing trench isolation material over the substrate within the trench, the trench isolation material including a portion that projects outwardly of the isolation trench, the portion having an outermost planar surface;    forming a transistor gate construction operably over the active area, the gate construction comprising conductive material having an outermost planar surface at least over said active area and which is coplanar with that of the trench isolation material.    
   
   
       38 . The method of  claim 37  wherein the semiconductive material comprises bulk semiconductive material of a bulk semiconductor substrate.  
   
   
       39 . The method of  claim 37  wherein the transistor gate construction is in the form of a gate line of multiple transistors formed over the substrate, the transistor gate line running over alternating active area and field trench isolation, the gate line conductive material having an outermost planar surface over said field trench isolation which is coplanar with that of the trench isolation material.  
   
   
       40 . The method of  claim 39  wherein the transistor gate line has thickness over immediately underlying material, said thickness being greater over the alternating active area than over the alternating field trench isolation.  
   
   
       41 . The method of  claim 37  wherein the conductive material comprises a composite of at least silicon and a silicide, the silicide forming said conductive material outermost planar surface.  
   
   
       42 - 69 . (canceled)