Semiconductor device and method of manufacturing the same
Abstract
There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a first impurity diffusion region and a second impurity diffusion region formed in a surface region of a semiconductor substrate; a first insulating layer formed over the semiconductor substrate; a first hole and a second hole formed in the first insulating layer; a first conductive plug formed in the first hole and connected electrically to the first impurity diffusion region; a second conductive plug formed in the second hole and connected electrically to the second impurity diffusion region; an oxygen-barrier metal layer formed in a shape of an island on the first conductive plug and its peripheral area and on the first insulating layer, said oxygen barrier metal layer having a side surface; an oxidation preventing layer formed on the first insulating layer and side surface of the oxygen-barrier metal layer and made of material that prevents oxidation of the second conductive plug, an upper surface of the oxidation preventing layer being planarized around the oxygen-barrier metal layer; a capacitor having a lower electrode formed on the oxygen-barrier metal layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer; a second insulating layer covering the capacitor and the oxidation preventing layer; a third hole formed in the second insulating layer over the second conductive plug; and a third conductive plug formed in the third hole and connected electrically to the second conductive plug; wherein an island-like conductive layer formed of same conductive material as the oxygen-barrier metal layer is formed on the second conductive layer, and the third conductive plug is connected to the second conductive plug via the island-like conductive layer.
2 . A semiconductor device according to claim 1 , wherein an oxidation preventing insulating layer is formed on side surfaces of the island-like conductive layer, side surfaces of the oxygen-barrier metal layer, and an upper surface of the first insulating layer.
3 . A semiconductor device according to claim 1 , wherein the oxygen-barrier metal layer constitutes a lower layer portion of the lower electrode of the capacitor.
4 . A semiconductor device according to claim 1 , wherein the oxygen-barrier metal layer has a substantially same size as the lower electrode of the capacitor.
5 . A semiconductor device according to claim 1 , wherein the oxygen-barrier metal layer consists of conductive layers, and an uppermost layer of the conductive layers is formed of conductive material that is polished more easily than the lowermost layer of the conductive layers.
6 . A semiconductor device according to claim 1 , wherein a conductive adhesion layer is formed between the oxygen-barrier metal layer and the lower electrode.
7 . A semiconductor device according to claim 6 , wherein an upper surface of the conductive adhesion layer has a same shape as a lower surface of the lower electrode.
8 . A semiconductor device according to claim 6 , wherein the oxygen-barrier metal layer is formed of same material as the conductive adhesion layer, and the conductive adhesion layer is formed at a position higher than the oxidation preventing insulating layer.
9 . A semiconductor device according to claim 6 , wherein the conductive adhesion layer is formed of iridium.
10 . A semiconductor device according to claim 1 , wherein a conductive adhesion layer is formed under the oxygen-barrier metal layer and on the first insulating layer over the first conductive plug and a peripheral area of the first conductive plug.
11 . A semiconductor device according to claim 10 , wherein the conductive adhesion layer is formed by either a single-layer structure made of titanium or titanium nitride or a double-layered structure constructed by forming titanium and titanium nitride sequentially.
12 . A manufacturing method of a semiconductor device comprising the steps of:
forming a first impurity diffusion region and a second impurity diffusion region on a surface region of a semiconductor substrate; forming a first insulating layer over the semiconductor substrate; forming a first hole and a second hole in the first insulating layer; forming a first conductive plug, which is connected electrically to the first impurity diffusion region, in the first hole and simultaneously forming a second conductive plug, which is connected electrically to the second impurity diffusion region, in the second hole; forming an oxygen-barrier metal layer on the first conductive plug and on the second conductive plug and over the first insulating layer; patterning the oxygen-barrier metal layer to leave the oxygen-barrier metal layer like an island on the first conductive plug; forming an oxidation preventing insulating layer on the second conductive plug and over the first insulating layer; exposing an upper surface of the oxygen-barrier metal layer like the island by polishing the oxidation preventing insulating layer; forming a first conductive layer on the oxygen-barrier metal layer like the island and over the oxidation preventing insulating layer; forming a dielectric layer on the first conductive layer; forming a second conductive layer on the dielectric layer; forming a capacitor on the oxygen-barrier metal layer over the first conductive plug by patterning the second conductive layer, the dielectric layer, and the first conductive layer; forming a second insulating layer over the capacitor, and the oxidation preventing insulating layer; forming a third hole over the second conductive plug by patterning the second insulating layer; and forming a third conductive plug, which is connected electrically to the second conductive plug, in the third hole.
13 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
forming an insulating adhesion layer over the oxidation preventing insulating layer, planarizing the insulating adhesion layer and the oxidation preventing insulating layer at the same time; and forming the third hole also in the insulating adhesion layer.
14 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
patterning the oxygen-barrier metal layer to leave the oxygen-barrier metal layer as an oxidation preventing conductive layer like an island on the second conductive plug and peripheral area of the second conductive plug; forming the third hole on the oxidation preventing conductive layer made of the oxygen-barrier metal layer; and forming the third conductive plug in the third hole to be connected to the second conductive plug electrically via the oxidation preventing conductive layer.
15 . A manufacturing method of a semiconductor device according to claim 12 , wherein the oxygen-barrier metal layer is patterned as a part of the lower electrode of the capacitor.
16 . A manufacturing method of a semiconductor device according to claim 12 , wherein the oxygen-barrier metal layer is patterned to have a substantially same size as the lower electrode of the capacitor.
17 . A manufacturing method of a semiconductor device according to claim 12 , wherein the oxygen-barrier metal layer consists of a lower layer and an upper layer, both made of different material, and the upper layer is made of a second material that is polished more easily than a first material constituting the lower layer.
18 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
forming a conductive adhesion layer between the oxygen-barrier metal layer like island and the first conductive layer; and patterning the conductive adhesion layer together with the first conductive layer into an island shape.
19 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
forming a conductive adhesion layer between the oxygen-barrier metal layer and the first insulating layer; and patterning the conductive adhesion layer together with the oxygen-barrier metal layer into the island shape.
20 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
forming a hard mask on the oxygen-barrier metal layer and over the first conductive plug; and etching a part of the oxygen-barrier metal layer exposed from the hard mask to leave the oxygen-barrier metal layer like the island.
21 . A manufacturing method of a semiconductor device according to claim 12 , further comprising the steps of:
removing the hard mask to expose the upper surface of the oxygen-barrier metal layer like the island by polishing, after covering the hard mask with the oxidation preventing insulating layer.
22 . A manufacturing method of a semiconductor device according to claim 21 , wherein the hard mask is formed of same material as material constituting a part of the second conductive plug.
23 . A manufacturing method of a semiconductor device according to claim 21 , wherein an upper portion of the hard mask consists of silicon oxidation.
24 . A manufacturing method of a semiconductor device according to claim 21 , wherein the oxidation preventing insulating layer consists of one of a single layer of alumina and a plural layer having alumina.
25 . A semiconductor device according to claim 1 , wherein an upper surface of the first conductive plug is located lower than an upper surface of the oxidation preventing layer.Cited by (0)
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